diff -NaHudr snes9x/snes9x/apu.h snes9x2/snes9x/apu.h --- snes9x/snes9x/apu.h 2003-07-23 21:24:00.000000000 +0300 +++ snes9x2/snes9x/apu.h 2004-06-15 14:17:08.000000000 +0300 @@ -84,8 +84,6 @@ uint8 *RAM; uint8 *DirectPage; bool8 APUExecuting; - uint8 Bit; - uint32 Address; uint8 *WaitAddress1; uint8 *WaitAddress2; uint32 WaitCounter; diff -NaHudr snes9x/snes9x/cpuaddr.h snes9x2/snes9x/cpuaddr.h --- snes9x/snes9x/cpuaddr.h 2003-09-30 21:04:28.000000000 +0300 +++ snes9x2/snes9x/cpuaddr.h 2004-06-15 18:10:11.000000000 +0300 @@ -76,8 +76,6 @@ #ifndef _CPUADDR_H_ #define _CPUADDR_H_ -EXTERN_C long OpAddress; - typedef enum { NONE = 0, READ = 1, @@ -86,49 +84,44 @@ JUMP = 4 } AccessMode; -STATIC inline void Immediate8 (AccessMode a) +STATIC inline long Immediate8 (AccessMode a) { - OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; + long OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC++; + return OpAddress; } -STATIC inline void Immediate16 (AccessMode a) +STATIC inline long Immediate16 (AccessMode a) { - OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; + long OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC += 2; + return OpAddress; } -STATIC inline void Relative (AccessMode a) +STATIC inline long Relative (AccessMode a) { - Int8 = *CPU.PC++; + int8 Int8 = *CPU.PC++; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif - OpAddress = ((int) (CPU.PC - CPU.PCBase) + Int8) & 0xffff; + return ((int) (CPU.PC - CPU.PCBase) + Int8) & 0xffff; } -STATIC inline void RelativeLong (AccessMode a) +STATIC inline long RelativeLong (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = *(uint16 *) CPU.PC; -#else - OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif + long OpAddress = ReadU16(CPU.PC); #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE; #endif CPU.PC += 2; OpAddress += (CPU.PC - CPU.PCBase); OpAddress &= 0xffff; + return OpAddress; } -STATIC inline void AbsoluteIndexedIndirect (AccessMode a) +STATIC inline long AbsoluteIndexedIndirect (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = (Registers.X.W + *(uint16 *) CPU.PC) & 0xffff; -#else - OpAddress = (Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff; -#endif + long OpAddress = (Registers.X.W + ReadU16(CPU.PC)) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2; #endif @@ -136,15 +129,12 @@ CPU.PC += 2; OpAddress = S9xGetWord (ICPU.ShiftedPB + OpAddress); if(a&READ) OpenBus = (uint8)(OpAddress>>8); + return OpAddress; } -STATIC inline void AbsoluteIndirectLong (AccessMode a) +STATIC inline long AbsoluteIndirectLong (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = *(uint16 *) CPU.PC; -#else - OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif + long OpAddress = ReadU16(CPU.PC); #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2; @@ -156,15 +146,12 @@ } else { OpAddress = S9xGetWord (OpAddress) | (S9xGetByte (OpAddress + 2) << 16); } + return OpAddress; } -STATIC inline void AbsoluteIndirect (AccessMode a) +STATIC inline long AbsoluteIndirect (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = *(uint16 *) CPU.PC; -#else - OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif + long OpAddress = ReadU16(CPU.PC); #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2; @@ -174,50 +161,46 @@ OpAddress = S9xGetWord (OpAddress); if(a&READ) OpenBus = (uint8)(OpAddress>>8); OpAddress += ICPU.ShiftedPB; + return OpAddress; } -STATIC inline void Absolute (AccessMode a) +STATIC inline long Absolute (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = *(uint16 *) CPU.PC + ICPU.ShiftedDB; -#else - OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB; -#endif + long OpAddress = ReadU16(CPU.PC) + ICPU.ShiftedDB; if(a&READ) OpenBus = *(CPU.PC+1); CPU.PC += 2; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2; #endif + return OpAddress; } -STATIC inline void AbsoluteLong (AccessMode a) +STATIC inline long AbsoluteLong (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = (*(uint32 *) CPU.PC) & 0xffffff; -#else - OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16); -#endif + long OpAddress = ReadU24(CPU.PC); if(a&READ) OpenBus = *(CPU.PC+2); CPU.PC += 3; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed; #endif + return OpAddress; } -STATIC inline void Direct(AccessMode a) +STATIC inline long Direct(AccessMode a) { if(a&READ) OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; + return OpAddress; } -STATIC inline void DirectIndirectIndexed (AccessMode a) +STATIC inline long DirectIndirectIndexed (AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif @@ -229,12 +212,13 @@ // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; // XXX: always add one if STA // XXX: else Add one cycle if crosses page boundary + return OpAddress; } -STATIC inline void DirectIndirectIndexedLong (AccessMode a) +STATIC inline long DirectIndirectIndexedLong (AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif @@ -245,12 +229,13 @@ OpAddress = S9xGetWord (OpAddress) + (S9xGetByte (OpAddress + 2) << 16) + Registers.Y.W; } // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; + return OpAddress; } -STATIC inline void DirectIndexedIndirect(AccessMode a) +STATIC inline long DirectIndexedIndirect(AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif @@ -265,12 +250,13 @@ // else CPU.Cycles += ONE_CYCLE; #endif + return OpAddress; } -STATIC inline void DirectIndexedX (AccessMode a) +STATIC inline long DirectIndexedX (AccessMode a) { if(a&READ) OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W); + long OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W); OpAddress &= CheckEmulation() ? 0xff : 0xffff; #ifndef SA1_OPCODES @@ -283,12 +269,13 @@ // else CPU.Cycles += ONE_CYCLE; #endif + return OpAddress; } -STATIC inline void DirectIndexedY (AccessMode a) +STATIC inline long DirectIndexedY (AccessMode a) { if(a&READ) OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W + Registers.Y.W); + long OpAddress = (*CPU.PC++ + Registers.D.W + Registers.Y.W); OpAddress &= CheckEmulation() ? 0xff : 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; @@ -300,16 +287,12 @@ // else CPU.Cycles += ONE_CYCLE; #endif + return OpAddress; } -STATIC inline void AbsoluteIndexedX (AccessMode a) +STATIC inline long AbsoluteIndexedX (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.X.W; -#else - OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) + - Registers.X.W; -#endif + long OpAddress = ICPU.ShiftedDB + ReadU16(CPU.PC) + Registers.X.W; if(a&READ) OpenBus = *(CPU.PC+1); CPU.PC += 2; #ifndef SA1_OPCODES @@ -317,16 +300,13 @@ #endif // XXX: always add one cycle for ROL, LSR, etc // XXX: else is cross page boundary add one cycle + return OpAddress; } -STATIC inline void AbsoluteIndexedY (AccessMode a) +STATIC inline long AbsoluteIndexedY (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.Y.W; -#else - OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) + - Registers.Y.W; -#endif + long OpAddress = ICPU.ShiftedDB + ReadU16(CPU.PC) + Registers.Y.W; + if(a&READ) OpenBus = *(CPU.PC+1); CPU.PC += 2; #ifndef SA1_OPCODES @@ -334,26 +314,24 @@ #endif // XXX: always add cycle for STA // XXX: else is cross page boundary add one cycle + return OpAddress; } -STATIC inline void AbsoluteLongIndexedX (AccessMode a) +STATIC inline long AbsoluteLongIndexedX (AccessMode a) { -#ifdef FAST_LSB_WORD_ACCESS - OpAddress = (*(uint32 *) CPU.PC + Registers.X.W) & 0xffffff; -#else - OpAddress = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + Registers.X.W) & 0xffffff; -#endif + long OpAddress = (ReadU24(CPU.PC) + Registers.X.W) & 0xffffff; if(a&READ) OpenBus = *(CPU.PC+2); CPU.PC += 3; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed; #endif + return OpAddress; } -STATIC inline void DirectIndirect (AccessMode a) +STATIC inline long DirectIndirect (AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif @@ -362,12 +340,13 @@ OpAddress += ICPU.ShiftedDB; // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; + return OpAddress; } -STATIC inline void DirectIndirectLong (AccessMode a) +STATIC inline long DirectIndirectLong (AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; #endif @@ -377,22 +356,24 @@ OpAddress = S9xGetWord (OpAddress) + (S9xGetByte (OpAddress + 2) << 16); } // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; + return OpAddress; } -STATIC inline void StackRelative (AccessMode a) +STATIC inline long StackRelative (AccessMode a) { if(a&READ) OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; CPU.Cycles += ONE_CYCLE; #endif + return OpAddress; } -STATIC inline void StackRelativeIndirectIndexed (AccessMode a) +STATIC inline long StackRelativeIndirectIndexed (AccessMode a) { OpenBus = *CPU.PC; - OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; + long OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeed; CPU.Cycles += TWO_CYCLES; @@ -401,5 +382,6 @@ if(a&READ) OpenBus = (uint8)(OpAddress>>8); OpAddress = (OpAddress + ICPU.ShiftedDB + Registers.Y.W) & 0xffffff; + return OpAddress; } #endif diff -NaHudr snes9x/snes9x/cpumacro.h snes9x2/snes9x/cpumacro.h --- snes9x/snes9x/cpumacro.h 2003-09-30 21:04:28.000000000 +0300 +++ snes9x2/snes9x/cpumacro.h 2004-06-16 02:56:02.000000000 +0300 @@ -1,877 +1,6 @@ -/******************************************************************************* - Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - - (c) Copyright 1996 - 2003 Gary Henderson (gary.henderson@ntlworld.com) and - Jerremy Koot (jkoot@snes9x.com) - - (c) Copyright 2002 - 2003 Matthew Kendora and - Brad Jorsch (anomie@users.sourceforge.net) - - - - C4 x86 assembler and some C emulation code - (c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com), - _Demo_ (_demo_@zsnes.com), and - Nach (n-a-c-h@users.sourceforge.net) - - C4 C++ code - (c) Copyright 2003 Brad Jorsch - - DSP-1 emulator code - (c) Copyright 1998 - 2003 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson, - John Weidman (jweidman@slip.net), - neviksti (neviksti@hotmail.com), and - Kris Bleakley (stinkfish@bigpond.com) - - DSP-2 emulator code - (c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and - Lord Nightmare (lord_nightmare@users.sourceforge.net - - OBC1 emulator code - (c) Copyright 2001 - 2003 zsKnight, pagefault (pagefault@zsnes.com) - Ported from x86 assembler to C by sanmaiwashi - - SPC7110 and RTC C++ emulator code - (c) Copyright 2002 Matthew Kendora with research by - zsKnight, John Weidman, and Dark Force - - S-RTC C emulator code - (c) Copyright 2001 John Weidman - - Super FX x86 assembler emulator code - (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault - - Super FX C emulator code - (c) Copyright 1997 - 1999 Ivar and Gary Henderson. - - - - - Specific ports contains the works of other authors. See headers in - individual files. - - Snes9x homepage: http://www.snes9x.com - - Permission to use, copy, modify and distribute Snes9x in both binary and - source form, for non-commercial purposes, is hereby granted without fee, - providing that this license information and copyright notice appear with - all copies and any derived work. - - This software is provided 'as-is', without any express or implied - warranty. In no event shall the authors be held liable for any damages - arising from the use of this software. - - Snes9x is freeware for PERSONAL USE only. Commercial users should - seek permission of the copyright holders first. Commercial use includes - charging money for Snes9x or software derived from Snes9x. - - The copyright holders request that bug fixes and improvements to the code - should be forwarded to them so everyone can benefit from the modifications - in future versions. - - Super NES and Super Nintendo Entertainment System are trademarks of - Nintendo Co., Limited and its subsidiary companies. -*******************************************************************************/ - #ifndef _CPUMACRO_H_ #define _CPUMACRO_H_ -STATIC inline void SetZN16 (uint16 Work) -{ - ICPU._Zero = Work != 0; - ICPU._Negative = (uint8) (Work >> 8); -} - -STATIC inline void SetZN8 (uint8 Work) -{ - ICPU._Zero = Work; - ICPU._Negative = Work; -} - -STATIC inline void ADC8 () -{ - Work8 = S9xGetByte (OpAddress); - - if (CheckDecimal ()) - { - A1 = (Registers.A.W) & 0xF; - A2 = (Registers.A.W >> 4) & 0xF; - W1 = Work8 & 0xF; - W2 = (Work8 >> 4) & 0xF; - - A1 += W1 + CheckCarry(); - if (A1 > 9) - { - A1 -= 10; - A1 &= 0xF; - A2++; - } - - A2 += W2; - if (A2 > 9) - { - A2 -= 10; - A2 &= 0xF; - SetCarry (); - } - else - { - ClearCarry (); - } - - Ans8 = (A2 << 4) | A1; - if (~(Registers.AL ^ Work8) & - (Work8 ^ Ans8) & 0x80) - SetOverflow(); - else - ClearOverflow(); - Registers.AL = Ans8; - SetZN8 (Registers.AL); - } - else - { - Ans16 = Registers.AL + Work8 + CheckCarry(); - - ICPU._Carry = Ans16 >= 0x100; - - if (~(Registers.AL ^ Work8) & - (Work8 ^ (uint8) Ans16) & 0x80) - SetOverflow(); - else - ClearOverflow(); - Registers.AL = (uint8) Ans16; - SetZN8 (Registers.AL); - - } -} - -STATIC inline void ADC16 () -{ - Work16 = S9xGetWord (OpAddress); - - if (CheckDecimal ()) - { - A1 = (Registers.A.W) & 0xF; - A2 = (Registers.A.W >> 4) & 0xF; - A3 = (Registers.A.W >> 8) & 0xF; - A4 = (Registers.A.W >> 12) & 0xF; - W1 = Work16 & 0xF; - W2 = (Work16 >> 4) & 0xF; - W3 = (Work16 >> 8) & 0xF; - W4 = (Work16 >> 12) & 0xF; - - A1 += W1 + CheckCarry (); - if (A1 > 9) - { - A1 -= 10; - A1 &= 0xF; - A2++; - } - - A2 += W2; - if (A2 > 9) - { - A2 -= 10; - A2 &= 0xF; - A3++; - } - - A3 += W3; - if (A3 > 9) - { - A3 -= 10; - A3 &= 0xF; - A4++; - } - - A4 += W4; - if (A4 > 9) - { - A4 -= 10; - A4 &= 0xF; - SetCarry (); - } - else - { - ClearCarry (); - } - - Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1); - if (~(Registers.A.W ^ Work16) & - (Work16 ^ Ans16) & 0x8000) - SetOverflow(); - else - ClearOverflow(); - Registers.A.W = Ans16; - SetZN16 (Registers.A.W); - } - else - { - Ans32 = Registers.A.W + Work16 + CheckCarry(); - - ICPU._Carry = Ans32 >= 0x10000; - - if (~(Registers.A.W ^ Work16) & - (Work16 ^ (uint16) Ans32) & 0x8000) - SetOverflow(); - else - ClearOverflow(); - Registers.A.W = (uint16) Ans32; - SetZN16 (Registers.A.W); - } -} - -STATIC inline void AND16 () -{ - Registers.A.W &= S9xGetWord (OpAddress); - SetZN16 (Registers.A.W); -} - -STATIC inline void AND8 () -{ - Registers.AL &= S9xGetByte (OpAddress); - SetZN8 (Registers.AL); -} - -STATIC inline void A_ASL16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - ICPU._Carry = (Registers.AH & 0x80) != 0; - Registers.A.W <<= 1; - SetZN16 (Registers.A.W); -} - -STATIC inline void A_ASL8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - ICPU._Carry = (Registers.AL & 0x80) != 0; - Registers.AL <<= 1; - SetZN8 (Registers.AL); -} - -STATIC inline void ASL16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetWord (OpAddress); - ICPU._Carry = (Work16 & 0x8000) != 0; - Work16 <<= 1; - //S9xSetWord (Work16, OpAddress); - S9xSetByte(Work16>>8, OpAddress+1); - S9xSetByte(Work16&0xFF, OpAddress); - SetZN16 (Work16); -} - -STATIC inline void ASL8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work8 = S9xGetByte (OpAddress); - ICPU._Carry = (Work8 & 0x80) != 0; - Work8 <<= 1; - S9xSetByte (Work8, OpAddress); - SetZN8 (Work8); -} - -STATIC inline void BIT16 () -{ - Work16 = S9xGetWord (OpAddress); - ICPU._Overflow = (Work16 & 0x4000) != 0; - ICPU._Negative = (uint8) (Work16 >> 8); - ICPU._Zero = (Work16 & Registers.A.W) != 0; -} - -STATIC inline void BIT8 () -{ - Work8 = S9xGetByte (OpAddress); - ICPU._Overflow = (Work8 & 0x40) != 0; - ICPU._Negative = Work8; - ICPU._Zero = Work8 & Registers.AL; -} - -STATIC inline void CMP16 () -{ - Int32 = (long) Registers.A.W - - (long) S9xGetWord (OpAddress); - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); -} - -STATIC inline void CMP8 () -{ - Int16 = (short) Registers.AL - - (short) S9xGetByte (OpAddress); - ICPU._Carry = Int16 >= 0; - SetZN8 ((uint8) Int16); -} - -STATIC inline void CMX16 () -{ - Int32 = (long) Registers.X.W - - (long) S9xGetWord (OpAddress); - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); -} - -STATIC inline void CMX8 () -{ - Int16 = (short) Registers.XL - - (short) S9xGetByte (OpAddress); - ICPU._Carry = Int16 >= 0; - SetZN8 ((uint8) Int16); -} - -STATIC inline void CMY16 () -{ - Int32 = (long) Registers.Y.W - - (long) S9xGetWord (OpAddress); - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); -} - -STATIC inline void CMY8 () -{ - Int16 = (short) Registers.YL - - (short) S9xGetByte (OpAddress); - ICPU._Carry = Int16 >= 0; - SetZN8 ((uint8) Int16); -} - -STATIC inline void A_DEC16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.A.W--; - SetZN16 (Registers.A.W); -} - -STATIC inline void A_DEC8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.AL--; - SetZN8 (Registers.AL); -} - -STATIC inline void DEC16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Work16 = S9xGetWord (OpAddress) - 1; - //S9xSetWord (Work16, OpAddress); - S9xSetByte (Work16>>8, OpAddress+1); - S9xSetByte (Work16&0xFF, OpAddress); - SetZN16 (Work16); -} - -STATIC inline void DEC8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Work8 = S9xGetByte (OpAddress) - 1; - S9xSetByte (Work8, OpAddress); - SetZN8 (Work8); -} - -STATIC inline void EOR16 () -{ - Registers.A.W ^= S9xGetWord (OpAddress); - SetZN16 (Registers.A.W); -} - -STATIC inline void EOR8 () -{ - Registers.AL ^= S9xGetByte (OpAddress); - SetZN8 (Registers.AL); -} - -STATIC inline void A_INC16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.A.W++; - SetZN16 (Registers.A.W); -} - -STATIC inline void A_INC8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.AL++; - SetZN8 (Registers.AL); -} - -STATIC inline void INC16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Work16 = S9xGetWord (OpAddress) + 1; - //S9xSetWord (Work16, OpAddress); - S9xSetByte (Work16>>8, OpAddress+1); - S9xSetByte (Work16&0xFF, OpAddress); - SetZN16 (Work16); -} - -STATIC inline void INC8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Work8 = S9xGetByte (OpAddress) + 1; - S9xSetByte (Work8, OpAddress); - SetZN8 (Work8); -} - -STATIC inline void LDA16 () -{ - Registers.A.W = S9xGetWord (OpAddress); - SetZN16 (Registers.A.W); -} - -STATIC inline void LDA8 () -{ - Registers.AL = S9xGetByte (OpAddress); - SetZN8 (Registers.AL); -} - -STATIC inline void LDX16 () -{ - Registers.X.W = S9xGetWord (OpAddress); - SetZN16 (Registers.X.W); -} - -STATIC inline void LDX8 () -{ - Registers.XL = S9xGetByte (OpAddress); - SetZN8 (Registers.XL); -} - -STATIC inline void LDY16 () -{ - Registers.Y.W = S9xGetWord (OpAddress); - SetZN16 (Registers.Y.W); -} - -STATIC inline void LDY8 () -{ - Registers.YL = S9xGetByte (OpAddress); - SetZN8 (Registers.YL); -} - -STATIC inline void A_LSR16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - ICPU._Carry = Registers.AL & 1; - Registers.A.W >>= 1; - SetZN16 (Registers.A.W); -} - -STATIC inline void A_LSR8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - ICPU._Carry = Registers.AL & 1; - Registers.AL >>= 1; - SetZN8 (Registers.AL); -} - -STATIC inline void LSR16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetWord (OpAddress); - ICPU._Carry = Work16 & 1; - Work16 >>= 1; - //S9xSetWord (Work16, OpAddress); - S9xSetByte (Work16>>8, OpAddress+1); - S9xSetByte (Work16&0xFF, OpAddress); - SetZN16 (Work16); -} - -STATIC inline void LSR8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work8 = S9xGetByte (OpAddress); - ICPU._Carry = Work8 & 1; - Work8 >>= 1; - S9xSetByte (Work8, OpAddress); - SetZN8 (Work8); -} - -STATIC inline void ORA16 () -{ - Registers.A.W |= S9xGetWord (OpAddress); - SetZN16 (Registers.A.W); -} - -STATIC inline void ORA8 () -{ - Registers.AL |= S9xGetByte (OpAddress); - SetZN8 (Registers.AL); -} - -STATIC inline void A_ROL16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work32 = (Registers.A.W << 1) | CheckCarry(); - ICPU._Carry = Work32 >= 0x10000; - Registers.A.W = (uint16) Work32; - SetZN16 ((uint16) Work32); -} - -STATIC inline void A_ROL8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = Registers.AL; - Work16 <<= 1; - Work16 |= CheckCarry(); - ICPU._Carry = Work16 >= 0x100; - Registers.AL = (uint8) Work16; - SetZN8 ((uint8) Work16); -} - -STATIC inline void ROL16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work32 = S9xGetWord (OpAddress); - Work32 <<= 1; - Work32 |= CheckCarry(); - ICPU._Carry = Work32 >= 0x10000; - //S9xSetWord ((uint16) Work32, OpAddress); - S9xSetByte((Work32>>8)&0xFF, OpAddress+1); - S9xSetByte(Work32&0xFF, OpAddress); - SetZN16 ((uint16) Work32); -} - -STATIC inline void ROL8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetByte (OpAddress); - Work16 <<= 1; - Work16 |= CheckCarry (); - ICPU._Carry = Work16 >= 0x100; - S9xSetByte ((uint8) Work16, OpAddress); - SetZN8 ((uint8) Work16); -} - -STATIC inline void A_ROR16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work32 = Registers.A.W; - Work32 |= (int) CheckCarry() << 16; - ICPU._Carry = (uint8) (Work32 & 1); - Work32 >>= 1; - Registers.A.W = (uint16) Work32; - SetZN16 ((uint16) Work32); -} - -STATIC inline void A_ROR8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = Registers.AL | ((uint16) CheckCarry() << 8); - ICPU._Carry = (uint8) Work16 & 1; - Work16 >>= 1; - Registers.AL = (uint8) Work16; - SetZN8 ((uint8) Work16); -} - -STATIC inline void ROR16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work32 = S9xGetWord (OpAddress); - Work32 |= (int) CheckCarry() << 16; - ICPU._Carry = (uint8) (Work32 & 1); - Work32 >>= 1; - //S9xSetWord ((uint16) Work32, OpAddress); - S9xSetByte ( (Work32>>8)&0x00FF, OpAddress+1); - S9xSetByte (Work32&0x00FF, OpAddress); - SetZN16 ((uint16) Work32); -} - -STATIC inline void ROR8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetByte (OpAddress); - Work16 |= (int) CheckCarry () << 8; - ICPU._Carry = (uint8) (Work16 & 1); - Work16 >>= 1; - S9xSetByte ((uint8) Work16, OpAddress); - SetZN8 ((uint8) Work16); -} - -STATIC inline void SBC16 () -{ - Work16 = S9xGetWord (OpAddress); - - if (CheckDecimal ()) - { - A1 = (Registers.A.W) & 0xF; - A2 = (Registers.A.W >> 4) & 0xF; - A3 = (Registers.A.W >> 8) & 0xF; - A4 = (Registers.A.W >> 12) & 0xF; - W1 = Work16 & 0xF; - W2 = (Work16 >> 4) & 0xF; - W3 = (Work16 >> 8) & 0xF; - W4 = (Work16 >> 12) & 0xF; - - A1 -= W1 + !CheckCarry (); - A2 -= W2; - A3 -= W3; - A4 -= W4; - if (A1 > 9) - { - A1 += 10; - A2--; - } - if (A2 > 9) - { - A2 += 10; - A3--; - } - if (A3 > 9) - { - A3 += 10; - A4--; - } - if (A4 > 9) - { - A4 += 10; - ClearCarry (); - } - else - { - SetCarry (); - } - - Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1); - if ((Registers.A.W ^ Work16) & - (Registers.A.W ^ Ans16) & 0x8000) - SetOverflow(); - else - ClearOverflow(); - Registers.A.W = Ans16; - SetZN16 (Registers.A.W); - } - else - { - - Int32 = (long) Registers.A.W - (long) Work16 + (long) CheckCarry() - 1; - - ICPU._Carry = Int32 >= 0; - - if ((Registers.A.W ^ Work16) & - (Registers.A.W ^ (uint16) Int32) & 0x8000) - SetOverflow(); - else - ClearOverflow (); - Registers.A.W = (uint16) Int32; - SetZN16 (Registers.A.W); - } -} - -STATIC inline void SBC8 () -{ - Work8 = S9xGetByte (OpAddress); - if (CheckDecimal ()) - { - A1 = (Registers.A.W) & 0xF; - A2 = (Registers.A.W >> 4) & 0xF; - W1 = Work8 & 0xF; - W2 = (Work8 >> 4) & 0xF; - - A1 -= W1 + !CheckCarry (); - A2 -= W2; - if (A1 > 9) - { - A1 += 10; - A2--; - } - if (A2 > 9) - { - A2 += 10; - ClearCarry (); - } - else - { - SetCarry (); - } - - Ans8 = (A2 << 4) | A1; - if ((Registers.AL ^ Work8) & - (Registers.AL ^ Ans8) & 0x80) - SetOverflow (); - else - ClearOverflow (); - Registers.AL = Ans8; - SetZN8 (Registers.AL); - } - else - { - Int16 = (short) Registers.AL - (short) Work8 + (short) CheckCarry() - 1; - - ICPU._Carry = Int16 >= 0; - if ((Registers.AL ^ Work8) & - (Registers.AL ^ (uint8) Int16) & 0x80) - SetOverflow (); - else - ClearOverflow (); - Registers.AL = (uint8) Int16; - SetZN8 (Registers.AL); - } -} - -STATIC inline void STA16 () -{ - S9xSetWord (Registers.A.W, OpAddress); -} - -STATIC inline void STA8 () -{ - S9xSetByte (Registers.AL, OpAddress); -} - -STATIC inline void STX16 () -{ - S9xSetWord (Registers.X.W, OpAddress); -} - -STATIC inline void STX8 () -{ - S9xSetByte (Registers.XL, OpAddress); -} - -STATIC inline void STY16 () -{ - S9xSetWord (Registers.Y.W, OpAddress); -} - -STATIC inline void STY8 () -{ - S9xSetByte (Registers.YL, OpAddress); -} - -STATIC inline void STZ16 () -{ - S9xSetWord (0, OpAddress); -} - -STATIC inline void STZ8 () -{ - S9xSetByte (0, OpAddress); -} - -STATIC inline void TSB16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetWord (OpAddress); - ICPU._Zero = (Work16 & Registers.A.W) != 0; - Work16 |= Registers.A.W; - //S9xSetWord (Work16, OpAddress); - S9xSetByte (Work16>>8, OpAddress+1); - S9xSetByte (Work16&0xFF, OpAddress); -} - -STATIC inline void TSB8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work8 = S9xGetByte (OpAddress); - ICPU._Zero = Work8 & Registers.AL; - Work8 |= Registers.AL; - S9xSetByte (Work8, OpAddress); -} - -STATIC inline void TRB16 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work16 = S9xGetWord (OpAddress); - ICPU._Zero = (Work16 & Registers.A.W) != 0; - Work16 &= ~Registers.A.W; - //S9xSetWord (Work16, OpAddress); - S9xSetByte (Work16>>8, OpAddress+1); - S9xSetByte (Work16&0xFF, OpAddress); -} +/* Content moved back to cpuops.cpp */ -STATIC inline void TRB8 () -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - Work8 = S9xGetByte (OpAddress); - ICPU._Zero = Work8 & Registers.AL; - Work8 &= ~Registers.AL; - S9xSetByte (Work8, OpAddress); -} #endif diff -NaHudr snes9x/snes9x/cpuops.cpp snes9x2/snes9x/cpuops.cpp --- snes9x/snes9x/cpuops.cpp 2004-06-01 10:52:19.000000000 +0300 +++ snes9x2/snes9x/cpuops.cpp 2004-06-18 14:39:53.364828176 +0300 @@ -86,204 +86,763 @@ #include "sa1.h" #include "spc7110.h" -START_EXTERN_C -extern uint8 A1, A2, A3, A4, W1, W2, W3, W4; -extern uint8 Ans8; -extern uint16 Ans16; -extern uint32 Ans32; -extern uint8 Work8; -extern uint16 Work16; -extern uint32 Work32; -extern signed char Int8; -extern short Int16; -extern long Int32; -END_EXTERN_C - #include "cpuexec.h" #include "cpuaddr.h" #include "cpuops.h" #include "cpumacro.h" #include "apu.h" + +#ifndef SA1_OPCODES +# define CyclesM1() CPU.Cycles += CPU.MemSpeed +# define CyclesM2() CPU.Cycles += CPU.MemSpeedx2 +# define CyclesM1p1() CPU.Cycles += CPU.MemSpeed + ONE_CYCLE +# define CyclesM2p2() CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES +# define Cycles1() CPU.Cycles += ONE_CYCLE +# define Cycles2() CPU.Cycles += TWO_CYCLES +# define Cycles3() CPU.Cycles += ONE_CYCLE * 3 +#else +# define CyclesM1() +# define CyclesM2() +# define CyclesM2p2() +# define CyclesM1p1() +# define Cycles1() +# define Cycles2() +# define Cycles3() +#endif + +STATIC inline void SetValue(pair& reg, uint8 v) { reg.B.l = v; } +STATIC inline void SetValue(pair& reg, uint16 v) { reg.W = v; } +STATIC inline void GetValue(const pair& reg, uint8& v) { v = reg.B.l; } +STATIC inline void GetValue(const pair& reg, uint16& v) { v = reg.W; } + +STATIC inline bool HighBit(const uint8 value) { return value&0x80; } +STATIC inline bool HighBit(const uint16 value) { return value&0x8000; } +STATIC inline uint8 HighByte(const uint8 value) { return value; } +STATIC inline uint8 HighByte(const uint16 value) { return value>>8; } +STATIC inline bool SemiHighBit(const uint8 value) { return value&0x40; } +STATIC inline bool SemiHighBit(const uint16 value) { return value&0x4000; } +STATIC inline uint8 SetHighBit(const uint8 value, bool v) { return value|(v<<7); } +STATIC inline uint16 SetHighBit(const uint16 value, bool v) { return value|(v<<15); } + +STATIC inline uint8 ImmedGet8() +{ + CyclesM1(); + //return S9xGetByte(Immediate8(READ)); + return *CPU.PC++; +} +STATIC inline uint16 ImmedGet16() +{ + CyclesM2(); + //return S9xGetWord(Immediate16(READ)); + uint16 retval = ReadU16(CPU.PC); + CPU.PC += 2; + return retval; +} + +STATIC inline void SetZN (uint16 Work) +{ + ICPU._Zero = Work != 0; + ICPU._Negative = (uint8) (Work >> 8); +} + +STATIC inline void SetZN (uint8 Work) +{ + ICPU._Zero = Work; + ICPU._Negative = Work; +} + +/* A proxy class for reading/writing at most once */ +/* Allows a memory expression to be used in functions without + * doing any extra memory accesses. + * GCC seems to be able to optimize the state variables (bool) + * out of the binary. + */ +template +struct WritingCache +{ + mutable inttype value; + mutable bool was_read; + bool was_written; + + WritingCache(): was_read(false), was_written(false) {} + inline void Finish(containertype& c) { if(was_written) c.CWrite(value); } + inline uint16 Read(const containertype& c) const + { + if(!was_read) { was_read=true; value=c.CRead(); } + return value; + } + inline void Write(inttype v) + { + was_written=was_read=true; + value=v; + } +}; + +/* Actors for different registers of different sizes */ +template +struct REG_A +{ + inline inttype CRead() const { inttype res; GetValue(Registers.A, res); return res; } + inline void CWrite(inttype n) { SetValue(Registers.A, n); } + + inline void operator= (inttype n) { CWrite(n); } + inline operator inttype () const { return CRead(); } + + typedef inttype type; + + private: void operator=(const REG_A&); +}; +template +struct REG_X +{ + inline inttype CRead() const { inttype res; GetValue(Registers.X, res); return res; } + inline void CWrite(inttype n) { SetValue(Registers.X, n); } + + inline void operator= (inttype n) { CWrite(n); } + inline operator inttype () const { return CRead(); } + + typedef inttype type; + + private: void operator=(const REG_X&); +}; +template +struct REG_Y +{ + inline inttype CRead() const { inttype res; GetValue(Registers.Y, res); return res; } + inline void CWrite(inttype n) { SetValue(Registers.Y, n); } + + inline void operator= (inttype n) { CWrite(n); } + inline operator inttype () const { return CRead(); } + + typedef inttype type; + + private: void operator=(const REG_Y&); +}; + +/* Actor for immediate parameters */ +template +struct IMMED +{ + WritingCache > c; + + inline inttype CRead() const; + inline void CWrite(inttype n) {} + + ~IMMED() { c.Finish(*this); } + + inline void operator= (inttype n) { c.Write(n); } + inline operator inttype () const { return c.Read(*this); } + + private: void operator=(const IMMED&); +}; +template<> inline uint8 IMMED::CRead() const { return ImmedGet8(); } +template<> inline uint16 IMMED::CRead() const { return ImmedGet16(); } + +/* Actor for memory addresses */ +template +struct MEM +{ + WritingCache > c; + long addr; + + inline inttype CRead() const; + inline void CWrite(inttype n); + + MEM(long OpAddr): addr(OpAddr) { } + ~MEM() { c.Finish(*this); } + + inline void operator= (inttype n) { c.Write(n); } + inline operator inttype () const { return c.Read(*this); } + + private: void operator=(const MEM&); +}; +template<> inline uint8 MEM::CRead() const { return S9xGetByte(addr); } +template<> inline uint16 MEM::CRead() const { return S9xGetWord(addr); } +template<> inline void MEM::CWrite(uint8 v) { S9xSetByte(v,addr); } +template<> inline void MEM::CWrite(uint16 v) +{ + /* Always writing two bytes instead of one word */ + S9xSetByte(v&255, addr); + S9xSetByte(v>>8, addr+1); +} + + +/** The ALU ops */ + +/* For C++ illiterates, a template is a macro that is instantiated + * based on the type of the arguments. The compiler will create + * one AND() function for each type/case it's called for. + * And inlining guarantees it won't actually create the function + * bodies. + */ + +template +STATIC inline void ASL (a target) +{ + ICPU._Carry = HighBit(target); + target = target << 1; + SetZN(target); + Cycles1(); +} + +template +STATIC inline void DEC (a target) /* also handles dex, dey */ +{ +#ifdef CPU_SHUTDOWN + CPU.WaitAddress = NULL; +#endif + target = target - 1; + SetZN(target); + Cycles1(); +} + +template +STATIC inline void INC (a target) /* also handles inx, iny */ +{ +#ifdef CPU_SHUTDOWN + CPU.WaitAddress = NULL; +#endif + target = target + 1; + SetZN(target); + Cycles1(); +} + +template +STATIC inline void LSR (a target) +{ + ICPU._Carry = target & 1; + target = target >> 1; + SetZN(target); + Cycles1(); +} + +template +STATIC inline void ROL (a target) +{ + bool OldCarry = CheckCarry(); + ICPU._Carry = HighBit(target); + target = (target << 1) | OldCarry; + SetZN(target); + Cycles1(); +} + +template +STATIC inline void ROR (a target) +{ + bool OldCarry = CheckCarry(); + ICPU._Carry = target & 1; + target = target >> 1; + target = SetHighBit(target, OldCarry); + SetZN(target); + Cycles1(); +} + +template +STATIC inline void STZ (a target) +{ + target = 0; +} + + + +template +STATIC inline void AND (a target, const b& source) +{ + target = target & source; + SetZN(target); +} + +/* For BIT, we define two functions because IMMED-BITs work + * differently than MEMORY-BITs. (At least in the old code.) + */ +template +STATIC inline void BIT (const a& reg, const MEM& value) +{ + ICPU._Overflow = SemiHighBit(value); + ICPU._Negative = HighByte(value); + ICPU._Zero = (reg & value) != 0; +} +template +STATIC inline void BIT (a reg, const IMMED& value) +{ + /* BIT with immed params doesn't touch O,N flags. Right? */ + ICPU._Zero = reg & value; +} + +template +STATIC inline void CMP (const a& reg, const b& value) +{ + long Int32 = (long) reg - (long) value; + ICPU._Carry = Int32 >= 0; + SetZN ((typename a::type) Int32); +} + +template +STATIC inline void EOR (a target, const b& source) +{ + target = target ^ source; + SetZN(target); +} + +template +STATIC inline void LDR (a target, const b& source) /* load register */ +{ + target = source; + SetZN(target); +} + +template +STATIC inline void ORA (a target, const b& source) +{ + target = target | source; + SetZN(target); +} + +template +STATIC inline void STR (const a& source, b target) /* store register */ +{ + target = source; +} + +template +STATIC inline void TRB (const a& source, b target) +{ + ICPU._Zero = (source & target) != 0; + target = target & ~source; + Cycles1(); +} + +template +STATIC inline void TSB (const a& source, b target) +{ + ICPU._Zero = (source & target) != 0; + target = target | source; + Cycles1(); +} + +template +STATIC inline void ADC (REG_A target, const b& source) +{ + uint8 Work8 = source; + + if (CheckDecimal ()) + { + uint8 A1 = (target) & 0xF; + uint8 A2 = (target >> 4) & 0xF; + uint8 W1 = Work8 & 0xF; + uint8 W2 = (Work8 >> 4) & 0xF; + + A1 += W1 + CheckCarry(); + if (A1 > 9) + { + A1 -= 10; + A1 &= 0xF; + A2++; + } + + A2 += W2; + if (A2 > 9) + { + A2 -= 10; + A2 &= 0xF; + SetCarry (); + } + else + { + ClearCarry (); + } + + uint8 Ans8 = (A2 << 4) | A1; + if (~(Registers.AL ^ Work8) & + (Work8 ^ Ans8) & 0x80) + SetOverflow(); + else + ClearOverflow(); + target = Ans8; + SetZN (target); + } + else + { + uint16 Ans16 = target + Work8 + CheckCarry(); + + ICPU._Carry = Ans16 >= 0x100; + + if (~(target ^ Work8) & + (Work8 ^ (uint8) Ans16) & 0x80) + SetOverflow(); + else + ClearOverflow(); + target = (uint8) Ans16; + SetZN (target); + + } +} + +template +STATIC inline void ADC (REG_A target, const b& source) +{ + uint16 Work16 = source; + + if (CheckDecimal ()) + { + uint8 A1 = (target) & 0xF; + uint8 A2 = (target >> 4) & 0xF; + uint8 A3 = (target >> 8) & 0xF; + uint8 A4 = (target >> 12) & 0xF; + uint8 W1 = Work16 & 0xF; + uint8 W2 = (Work16 >> 4) & 0xF; + uint8 W3 = (Work16 >> 8) & 0xF; + uint8 W4 = (Work16 >> 12) & 0xF; + + A1 += W1 + CheckCarry (); + if (A1 > 9) + { + A1 -= 10; + A1 &= 0xF; + A2++; + } + + A2 += W2; + if (A2 > 9) + { + A2 -= 10; + A2 &= 0xF; + A3++; + } + + A3 += W3; + if (A3 > 9) + { + A3 -= 10; + A3 &= 0xF; + A4++; + } + + A4 += W4; + if (A4 > 9) + { + A4 -= 10; + A4 &= 0xF; + SetCarry (); + } + else + { + ClearCarry (); + } + + uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1); + if (~(target ^ Work16) & + (Work16 ^ Ans16) & 0x8000) + SetOverflow(); + else + ClearOverflow(); + target = Ans16; + SetZN (target); + } + else + { + uint32 Ans32 = target + Work16 + CheckCarry(); + + ICPU._Carry = Ans32 >= 0x10000; + + if (~(target ^ Work16) & + (Work16 ^ (uint16) Ans32) & 0x8000) + SetOverflow(); + else + ClearOverflow(); + target = (uint16) Ans32; + SetZN (target); + } +} + +template +STATIC inline void SBC (REG_A target, const b& source) +{ + uint16 Work16 = source; + + if (CheckDecimal ()) + { + uint8 A1 = (target) & 0xF; + uint8 A2 = (target >> 4) & 0xF; + uint8 A3 = (target >> 8) & 0xF; + uint8 A4 = (target >> 12) & 0xF; + uint8 W1 = Work16 & 0xF; + uint8 W2 = (Work16 >> 4) & 0xF; + uint8 W3 = (Work16 >> 8) & 0xF; + uint8 W4 = (Work16 >> 12) & 0xF; + + A1 -= W1 + !CheckCarry (); + A2 -= W2; + A3 -= W3; + A4 -= W4; + if (A1 > 9) + { + A1 += 10; + A2--; + } + if (A2 > 9) + { + A2 += 10; + A3--; + } + if (A3 > 9) + { + A3 += 10; + A4--; + } + if (A4 > 9) + { + A4 += 10; + ClearCarry (); + } + else + { + SetCarry (); + } + + uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1); + if ((target ^ Work16) & + (target ^ Ans16) & 0x8000) + SetOverflow(); + else + ClearOverflow(); + target = Ans16; + SetZN (target); + } + else + { + + int32 Int32 = (long) target - (long) Work16 + (long) CheckCarry() - 1; + + ICPU._Carry = Int32 >= 0; + + if ((target ^ Work16) & + (target ^ (uint16) Int32) & 0x8000) + SetOverflow(); + else + ClearOverflow (); + target = (uint16) Int32; + SetZN (target); + } +} + +template +STATIC inline void SBC (REG_A target, const b& source) +{ + uint8 Work8 = source; + if (CheckDecimal ()) + { + uint8 A1 = (target) & 0xF; + uint8 A2 = (target >> 4) & 0xF; + uint8 W1 = Work8 & 0xF; + uint8 W2 = (Work8 >> 4) & 0xF; + + A1 -= W1 + !CheckCarry (); + A2 -= W2; + if (A1 > 9) + { + A1 += 10; + A2--; + } + if (A2 > 9) + { + A2 += 10; + ClearCarry (); + } + else + { + SetCarry (); + } + + uint8 Ans8 = (A2 << 4) | A1; + if ((target ^ Work8) & + (target ^ Ans8) & 0x80) + SetOverflow (); + else + ClearOverflow (); + target = Ans8; + SetZN (target); + } + else + { + int16 Int16 = (short) target - (short) Work8 + (short) CheckCarry() - 1; + + ICPU._Carry = Int16 >= 0; + if ((target ^ Work8) & + (target ^ (uint8) Int16) & 0x80) + SetOverflow (); + else + ClearOverflow (); + target = (uint8) Int16; + SetZN (target); + } +} + + + +/* Here we resort to C-style macroes to create the most readable syntax. */ + +#define UNARYOP_MEM(OP, Bits, Type) OP( MEM (Type (MODIFY)) ); +#define UNARYOP_REG(OP, Reg1, Bits) OP( Reg1() ); + +#define BINARYOP_IMMED(OP, Reg1, Bits) OP( Reg1(), IMMED() ) +#define BINARYOP_MEM_R(OP, Reg1, Bits, Type) OP( Reg1(), MEM (Type(READ)) ) +#define BINARYOP_MEM_W(OP, Reg1, Bits, Type) OP( Reg1(), MEM (Type(WRITE)) ) + +#define BINARYOP_MEM_RW(OP, Reg1, Bits, Type) OP( Reg1(), MEM (Type(MODIFY)) ) + + + /* ADC *************************************************************************************** */ static void Op69M1 (void) { - Immediate8 (READ); - ADC8 (); + BINARYOP_IMMED(ADC, REG_A, uint8); } static void Op69M0 (void) { - Immediate16 (READ); - ADC16 (); + BINARYOP_IMMED(ADC, REG_A, uint16); } static void Op65M1 (void) { - Direct (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, Direct); } static void Op65M0 (void) { - Direct (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, Direct); } static void Op75M1 (void) { - DirectIndexedX (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndexedX); } static void Op75M0 (void) { - DirectIndexedX (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndexedX); } static void Op72M1 (void) { - DirectIndirect (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndirect); } static void Op72M0 (void) { - DirectIndirect (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndirect); } static void Op61M1 (void) { - DirectIndexedIndirect (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndexedIndirect); } static void Op61M0 (void) { - DirectIndexedIndirect (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndexedIndirect); } static void Op71M1 (void) { - DirectIndirectIndexed (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndirectIndexed); } static void Op71M0 (void) { - DirectIndirectIndexed (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndirectIndexed); } static void Op67M1 (void) { - DirectIndirectLong (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndirectLong); } static void Op67M0 (void) { - DirectIndirectLong (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndirectLong); } static void Op77M1 (void) { - DirectIndirectIndexedLong (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, DirectIndirectIndexedLong); } static void Op77M0 (void) { - DirectIndirectIndexedLong (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, DirectIndirectIndexedLong); } static void Op6DM1 (void) { - Absolute (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, Absolute); } static void Op6DM0 (void) { - Absolute (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, Absolute); } static void Op7DM1 (void) { - AbsoluteIndexedX (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, AbsoluteIndexedX); } static void Op7DM0 (void) { - AbsoluteIndexedX (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, AbsoluteIndexedX); } static void Op79M1 (void) { - AbsoluteIndexedY (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, AbsoluteIndexedY); } static void Op79M0 (void) { - AbsoluteIndexedY (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, AbsoluteIndexedY); } static void Op6FM1 (void) { - AbsoluteLong (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, AbsoluteLong); } static void Op6FM0 (void) { - AbsoluteLong (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, AbsoluteLong); } static void Op7FM1 (void) { - AbsoluteLongIndexedX (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, AbsoluteLongIndexedX); } static void Op7FM0 (void) { - AbsoluteLongIndexedX (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, AbsoluteLongIndexedX); } static void Op63M1 (void) { - StackRelative (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, StackRelative); } static void Op63M0 (void) { - StackRelative (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, StackRelative); } static void Op73M1 (void) { - StackRelativeIndirectIndexed (READ); - ADC8 (); + BINARYOP_MEM_R(ADC, REG_A, uint8, StackRelativeIndirectIndexed); } static void Op73M0 (void) { - StackRelativeIndirectIndexed (READ); - ADC16 (); + BINARYOP_MEM_R(ADC, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ @@ -291,520 +850,408 @@ /* AND *************************************************************************************** */ static void Op29M1 (void) { - Registers.AL &= *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.AL); + BINARYOP_IMMED(AND, REG_A, uint8); } static void Op29M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.A.W &= *(uint16 *) CPU.PC; -#else - Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.A.W); + BINARYOP_IMMED(AND, REG_A, uint16); } static void Op25M1 (void) { - Direct (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, Direct); } static void Op25M0 (void) { - Direct (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, Direct); } static void Op35M1 (void) { - DirectIndexedX (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndexedX); } static void Op35M0 (void) { - DirectIndexedX (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndexedX); } static void Op32M1 (void) { - DirectIndirect (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndirect); } static void Op32M0 (void) { - DirectIndirect (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndirect); } static void Op21M1 (void) { - DirectIndexedIndirect (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndexedIndirect); } static void Op21M0 (void) { - DirectIndexedIndirect (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndexedIndirect); } static void Op31M1 (void) { - DirectIndirectIndexed (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndirectIndexed); } static void Op31M0 (void) { - DirectIndirectIndexed (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndirectIndexed); } static void Op27M1 (void) { - DirectIndirectLong (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndirectLong); } static void Op27M0 (void) { - DirectIndirectLong (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndirectLong); } static void Op37M1 (void) { - DirectIndirectIndexedLong (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, DirectIndirectIndexedLong); } static void Op37M0 (void) { - DirectIndirectIndexedLong (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, DirectIndirectIndexedLong); } static void Op2DM1 (void) { - Absolute (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, Absolute); } static void Op2DM0 (void) { - Absolute (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, Absolute); } static void Op3DM1 (void) { - AbsoluteIndexedX (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, AbsoluteIndexedX); } static void Op3DM0 (void) { - AbsoluteIndexedX (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, AbsoluteIndexedX); } static void Op39M1 (void) { - AbsoluteIndexedY (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, AbsoluteIndexedY); } static void Op39M0 (void) { - AbsoluteIndexedY (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, AbsoluteIndexedY); } static void Op2FM1 (void) { - AbsoluteLong (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, AbsoluteLong); } static void Op2FM0 (void) { - AbsoluteLong (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, AbsoluteLong); } static void Op3FM1 (void) { - AbsoluteLongIndexedX (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, AbsoluteLongIndexedX); } static void Op3FM0 (void) { - AbsoluteLongIndexedX (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, AbsoluteLongIndexedX); } static void Op23M1 (void) { - StackRelative (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, StackRelative); } static void Op23M0 (void) { - StackRelative (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, StackRelative); } static void Op33M1 (void) { - StackRelativeIndirectIndexed (READ); - AND8 (); + BINARYOP_MEM_R(AND, REG_A, uint8, StackRelativeIndirectIndexed); } static void Op33M0 (void) { - StackRelativeIndirectIndexed (READ); - AND16 (); + BINARYOP_MEM_R(AND, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ /* ASL *************************************************************************************** */ static void Op0AM1 (void) { - A_ASL8 (); + UNARYOP_REG(ASL, REG_A, uint8); } static void Op0AM0 (void) { - A_ASL16 (); + UNARYOP_REG(ASL, REG_A, uint16); } static void Op06M1 (void) { - Direct (MODIFY); - ASL8 (); + UNARYOP_MEM(ASL, uint8, Direct); } static void Op06M0 (void) { - Direct (MODIFY); - ASL16 (); + UNARYOP_MEM(ASL, uint16, Direct); } static void Op16M1 (void) { - DirectIndexedX (MODIFY); - ASL8 (); + UNARYOP_MEM(ASL, uint8, DirectIndexedX); } static void Op16M0 (void) { - DirectIndexedX (MODIFY); - ASL16 (); + UNARYOP_MEM(ASL, uint16, DirectIndexedX); } static void Op0EM1 (void) { - Absolute (MODIFY); - ASL8 (); + UNARYOP_MEM(ASL, uint8, Absolute); } static void Op0EM0 (void) { - Absolute (MODIFY); - ASL16 (); + UNARYOP_MEM(ASL, uint16, Absolute); } static void Op1EM1 (void) { - AbsoluteIndexedX (MODIFY); - ASL8 (); + UNARYOP_MEM(ASL, uint8, AbsoluteIndexedX); } static void Op1EM0 (void) { - AbsoluteIndexedX (MODIFY); - ASL16 (); + UNARYOP_MEM(ASL, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* BIT *************************************************************************************** */ static void Op89M1 (void) { - ICPU._Zero = Registers.AL & *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif + BINARYOP_IMMED(BIT, REG_A, uint8); } static void Op89M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0; -#else - ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0; -#endif -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - CPU.PC += 2; + BINARYOP_IMMED(BIT, REG_A, uint16); } static void Op24M1 (void) { - Direct (READ); - BIT8 (); + BINARYOP_MEM_R(BIT, REG_A, uint8, Direct); } static void Op24M0 (void) { - Direct (READ); - BIT16 (); + BINARYOP_MEM_R(BIT, REG_A, uint16, Direct); } static void Op34M1 (void) { - DirectIndexedX (READ); - BIT8 (); + BINARYOP_MEM_R(BIT, REG_A, uint8, DirectIndexedX); } static void Op34M0 (void) { - DirectIndexedX (READ); - BIT16 (); + BINARYOP_MEM_R(BIT, REG_A, uint16, DirectIndexedX); } static void Op2CM1 (void) { - Absolute (READ); - BIT8 (); + BINARYOP_MEM_R(BIT, REG_A, uint8, Absolute); } static void Op2CM0 (void) { - Absolute (READ); - BIT16 (); + BINARYOP_MEM_R(BIT, REG_A, uint16, Absolute); } static void Op3CM1 (void) { - AbsoluteIndexedX (READ); - BIT8 (); + BINARYOP_MEM_R(BIT, REG_A, uint8, AbsoluteIndexedX); } static void Op3CM0 (void) { - AbsoluteIndexedX (READ); - BIT16 (); + BINARYOP_MEM_R(BIT, REG_A, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* CMP *************************************************************************************** */ static void OpC9M1 (void) { - Int32 = (int) Registers.AL - (int) *CPU.PC++; - ICPU._Carry = Int32 >= 0; - SetZN8 ((uint8) Int32); -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif + BINARYOP_IMMED(CMP, REG_A, uint8); } static void OpC9M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC; -#else - Int32 = (long) Registers.A.W - - (long) (*CPU.PC + (*(CPU.PC + 1) << 8)); -#endif - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif + BINARYOP_IMMED(CMP, REG_A, uint16); } static void OpC5M1 (void) { - Direct (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, Direct); } static void OpC5M0 (void) { - Direct (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, Direct); } static void OpD5M1 (void) { - DirectIndexedX (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndexedX); } static void OpD5M0 (void) { - DirectIndexedX (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndexedX); } static void OpD2M1 (void) { - DirectIndirect (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndirect); } static void OpD2M0 (void) { - DirectIndirect (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndirect); } static void OpC1M1 (void) { - DirectIndexedIndirect (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndexedIndirect); } static void OpC1M0 (void) { - DirectIndexedIndirect (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndexedIndirect); } static void OpD1M1 (void) { - DirectIndirectIndexed (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndirectIndexed); } static void OpD1M0 (void) { - DirectIndirectIndexed (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndirectIndexed); } static void OpC7M1 (void) { - DirectIndirectLong (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndirectLong); } static void OpC7M0 (void) { - DirectIndirectLong (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndirectLong); } static void OpD7M1 (void) { - DirectIndirectIndexedLong (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, DirectIndirectIndexedLong); } static void OpD7M0 (void) { - DirectIndirectIndexedLong (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, DirectIndirectIndexedLong); } static void OpCDM1 (void) { - Absolute (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, Absolute); } static void OpCDM0 (void) { - Absolute (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, Absolute); } static void OpDDM1 (void) { - AbsoluteIndexedX (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, AbsoluteIndexedX); } static void OpDDM0 (void) { - AbsoluteIndexedX (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, AbsoluteIndexedX); } static void OpD9M1 (void) { - AbsoluteIndexedY (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, AbsoluteIndexedY); } static void OpD9M0 (void) { - AbsoluteIndexedY (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, AbsoluteIndexedY); } static void OpCFM1 (void) { - AbsoluteLong (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, AbsoluteLong); } static void OpCFM0 (void) { - AbsoluteLong (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, AbsoluteLong); } static void OpDFM1 (void) { - AbsoluteLongIndexedX (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, AbsoluteLongIndexedX); } static void OpDFM0 (void) { - AbsoluteLongIndexedX (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, AbsoluteLongIndexedX); } static void OpC3M1 (void) { - StackRelative (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, StackRelative); } static void OpC3M0 (void) { - StackRelative (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, StackRelative); } static void OpD3M1 (void) { - StackRelativeIndirectIndexed (READ); - CMP8 (); + BINARYOP_MEM_R(CMP, REG_A, uint8, StackRelativeIndirectIndexed); } static void OpD3M0 (void) { - StackRelativeIndirectIndexed (READ); - CMP16 (); + BINARYOP_MEM_R(CMP, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ @@ -812,52 +1259,32 @@ /* CMX *************************************************************************************** */ static void OpE0X1 (void) { - Int32 = (int) Registers.XL - (int) *CPU.PC++; - ICPU._Carry = Int32 >= 0; - SetZN8 ((uint8) Int32); -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif + BINARYOP_IMMED(CMP, REG_X, uint8); } static void OpE0X0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Int32 = (long) Registers.X.W - (long) *(uint16 *) CPU.PC; -#else - Int32 = (long) Registers.X.W - - (long) (*CPU.PC + (*(CPU.PC + 1) << 8)); -#endif - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif + BINARYOP_IMMED(CMP, REG_X, uint16); } static void OpE4X1 (void) { - Direct (READ); - CMX8 (); + BINARYOP_MEM_R(CMP, REG_X, uint8, Direct); } static void OpE4X0 (void) { - Direct (READ); - CMX16 (); + BINARYOP_MEM_R(CMP, REG_X, uint16, Direct); } static void OpECX1 (void) { - Absolute (READ); - CMX8 (); + BINARYOP_MEM_R(CMP, REG_X, uint8, Absolute); } static void OpECX0 (void) { - Absolute (READ); - CMX16 (); + BINARYOP_MEM_R(CMP, REG_X, uint16, Absolute); } /**********************************************************************************************/ @@ -865,113 +1292,105 @@ /* CMY *************************************************************************************** */ static void OpC0X1 (void) { - Int32 = (int) Registers.YL - (int) *CPU.PC++; - ICPU._Carry = Int32 >= 0; - SetZN8 ((uint8) Int32); -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif + BINARYOP_IMMED(CMP, REG_Y, uint8); } static void OpC0X0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Int32 = (long) Registers.Y.W - (long) *(uint16 *) CPU.PC; -#else - Int32 = (long) Registers.Y.W - - (long) (*CPU.PC + (*(CPU.PC + 1) << 8)); -#endif - ICPU._Carry = Int32 >= 0; - SetZN16 ((uint16) Int32); - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif + BINARYOP_IMMED(CMP, REG_Y, uint16); } static void OpC4X1 (void) { - Direct (READ); - CMY8 (); + BINARYOP_MEM_R(CMP, REG_Y, uint8, Direct); } static void OpC4X0 (void) { - Direct (READ); - CMY16 (); + BINARYOP_MEM_R(CMP, REG_Y, uint16, Direct); } static void OpCCX1 (void) { - Absolute (READ); - CMY8 (); + BINARYOP_MEM_R(CMP, REG_Y, uint8, Absolute); } static void OpCCX0 (void) { - Absolute (READ); - CMY16 (); + BINARYOP_MEM_R(CMP, REG_Y, uint16, Absolute); } /**********************************************************************************************/ -/* DEC *************************************************************************************** */ +/* DEC/DEX/DEY ****************************************************************************** */ static void Op3AM1 (void) { - A_DEC8 (); + UNARYOP_REG(DEC, REG_A, uint8); } static void Op3AM0 (void) { - A_DEC16 (); + UNARYOP_REG(DEC, REG_A, uint16); +} + +static void OpCAX1 (void) +{ + UNARYOP_REG(DEC, REG_X, uint8); +} + +static void OpCAX0 (void) +{ + UNARYOP_REG(DEC, REG_X, uint16); +} + +static void Op88X1 (void) +{ + UNARYOP_REG(DEC, REG_Y, uint8); +} + +static void Op88X0 (void) +{ + UNARYOP_REG(DEC, REG_Y, uint16); } static void OpC6M1 (void) { - Direct (MODIFY); - DEC8 (); + UNARYOP_MEM(DEC, uint8, Direct); } static void OpC6M0 (void) { - Direct (MODIFY); - DEC16 (); + UNARYOP_MEM(DEC, uint16, Direct); } static void OpD6M1 (void) { - DirectIndexedX (MODIFY); - DEC8 (); + UNARYOP_MEM(DEC, uint8, DirectIndexedX); } static void OpD6M0 (void) { - DirectIndexedX (MODIFY); - DEC16 (); + UNARYOP_MEM(DEC, uint16, DirectIndexedX); } static void OpCEM1 (void) { - Absolute (MODIFY); - DEC8 (); + UNARYOP_MEM(DEC, uint8, Absolute); } static void OpCEM0 (void) { - Absolute (MODIFY); - DEC16 (); + UNARYOP_MEM(DEC, uint16, Absolute); } static void OpDEM1 (void) { - AbsoluteIndexedX (MODIFY); - DEC8 (); + UNARYOP_MEM(DEC, uint8, AbsoluteIndexedX); } static void OpDEM0 (void) { - AbsoluteIndexedX (MODIFY); - DEC16 (); + UNARYOP_MEM(DEC, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ @@ -979,448 +1398,377 @@ /* EOR *************************************************************************************** */ static void Op49M1 (void) { - Registers.AL ^= *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.AL); + BINARYOP_IMMED(EOR, REG_A, uint8); } static void Op49M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.A.W ^= *(uint16 *) CPU.PC; -#else - Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.A.W); + BINARYOP_IMMED(EOR, REG_A, uint16); } static void Op45M1 (void) { - Direct (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, Direct); } static void Op45M0 (void) { - Direct (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, Direct); } static void Op55M1 (void) { - DirectIndexedX (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndexedX); } static void Op55M0 (void) { - DirectIndexedX (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndexedX); } static void Op52M1 (void) { - DirectIndirect (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndirect); } static void Op52M0 (void) { - DirectIndirect (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndirect); } static void Op41M1 (void) { - DirectIndexedIndirect (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndexedIndirect); } static void Op41M0 (void) { - DirectIndexedIndirect (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndexedIndirect); } static void Op51M1 (void) { - DirectIndirectIndexed (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndirectIndexed); } static void Op51M0 (void) { - DirectIndirectIndexed (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndirectIndexed); } static void Op47M1 (void) { - DirectIndirectLong (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndirectLong); } static void Op47M0 (void) { - DirectIndirectLong (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndirectLong); } static void Op57M1 (void) { - DirectIndirectIndexedLong (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, DirectIndirectIndexedLong); } static void Op57M0 (void) { - DirectIndirectIndexedLong (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, DirectIndirectIndexedLong); } static void Op4DM1 (void) { - Absolute (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, Absolute); } static void Op4DM0 (void) { - Absolute (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, Absolute); } static void Op5DM1 (void) { - AbsoluteIndexedX (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, AbsoluteIndexedX); } static void Op5DM0 (void) { - AbsoluteIndexedX (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, AbsoluteIndexedX); } static void Op59M1 (void) { - AbsoluteIndexedY (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, AbsoluteIndexedY); } static void Op59M0 (void) { - AbsoluteIndexedY (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, AbsoluteIndexedY); } static void Op4FM1 (void) { - AbsoluteLong (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, AbsoluteLong); } static void Op4FM0 (void) { - AbsoluteLong (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, AbsoluteLong); } static void Op5FM1 (void) { - AbsoluteLongIndexedX (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, AbsoluteLongIndexedX); } static void Op5FM0 (void) { - AbsoluteLongIndexedX (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, AbsoluteLongIndexedX); } static void Op43M1 (void) { - StackRelative (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, StackRelative); } static void Op43M0 (void) { - StackRelative (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, StackRelative); } static void Op53M1 (void) { - StackRelativeIndirectIndexed (READ); - EOR8 (); + BINARYOP_MEM_R(EOR, REG_A, uint8, StackRelativeIndirectIndexed); } static void Op53M0 (void) { - StackRelativeIndirectIndexed (READ); - EOR16 (); + BINARYOP_MEM_R(EOR, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ -/* INC *************************************************************************************** */ +/* INC/INX/INY ******************************************************************************* */ static void Op1AM1 (void) { - A_INC8 (); + UNARYOP_REG(INC, REG_A, uint8); } static void Op1AM0 (void) { - A_INC16 (); + UNARYOP_REG(INC, REG_A, uint16); +} + +static void OpE8X1 (void) +{ + UNARYOP_REG(INC, REG_X, uint8); +} + +static void OpE8X0 (void) +{ + UNARYOP_REG(INC, REG_X, uint16); +} + +static void OpC8X1 (void) +{ + UNARYOP_REG(INC, REG_Y, uint8); +} + +static void OpC8X0 (void) +{ + UNARYOP_REG(INC, REG_Y, uint16); } static void OpE6M1 (void) { - Direct (MODIFY); - INC8 (); + UNARYOP_MEM(INC, uint8, Direct); } static void OpE6M0 (void) { - Direct (MODIFY); - INC16 (); + UNARYOP_MEM(INC, uint16, Direct); } static void OpF6M1 (void) { - DirectIndexedX (MODIFY); - INC8 (); + UNARYOP_MEM(INC, uint8, DirectIndexedX); } static void OpF6M0 (void) { - DirectIndexedX (MODIFY); - INC16 (); + UNARYOP_MEM(INC, uint16, DirectIndexedX); } static void OpEEM1 (void) { - Absolute (MODIFY); - INC8 (); + UNARYOP_MEM(INC, uint8, Absolute); } static void OpEEM0 (void) { - Absolute (MODIFY); - INC16 (); + UNARYOP_MEM(INC, uint16, Absolute); } static void OpFEM1 (void) { - AbsoluteIndexedX (MODIFY); - INC8 (); + UNARYOP_MEM(INC, uint8, AbsoluteIndexedX); } static void OpFEM0 (void) { - AbsoluteIndexedX (MODIFY); - INC16 (); + UNARYOP_MEM(INC, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* LDA *************************************************************************************** */ static void OpA9M1 (void) { - Registers.AL = *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.AL); + BINARYOP_IMMED(LDR, REG_A, uint8); } static void OpA9M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.A.W = *(uint16 *) CPU.PC; -#else - Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.A.W); + BINARYOP_IMMED(LDR, REG_A, uint16); } static void OpA5M1 (void) { - Direct (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, Direct); } static void OpA5M0 (void) { - Direct (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, Direct); } static void OpB5M1 (void) { - DirectIndexedX (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndexedX); } static void OpB5M0 (void) { - DirectIndexedX (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndexedX); } static void OpB2M1 (void) { - DirectIndirect (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndirect); } static void OpB2M0 (void) { - DirectIndirect (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndirect); } static void OpA1M1 (void) { - DirectIndexedIndirect (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndexedIndirect); } static void OpA1M0 (void) { - DirectIndexedIndirect (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndexedIndirect); } static void OpB1M1 (void) { - DirectIndirectIndexed (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndirectIndexed); } static void OpB1M0 (void) { - DirectIndirectIndexed (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndirectIndexed); } static void OpA7M1 (void) { - DirectIndirectLong (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndirectLong); } static void OpA7M0 (void) { - DirectIndirectLong (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndirectLong); } static void OpB7M1 (void) { - DirectIndirectIndexedLong (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, DirectIndirectIndexedLong); } static void OpB7M0 (void) { - DirectIndirectIndexedLong (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, DirectIndirectIndexedLong); } static void OpADM1 (void) { - Absolute (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, Absolute); } static void OpADM0 (void) { - Absolute (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, Absolute); } static void OpBDM1 (void) { - AbsoluteIndexedX (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, AbsoluteIndexedX); } static void OpBDM0 (void) { - AbsoluteIndexedX (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, AbsoluteIndexedX); } static void OpB9M1 (void) { - AbsoluteIndexedY (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, AbsoluteIndexedY); } static void OpB9M0 (void) { - AbsoluteIndexedY (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, AbsoluteIndexedY); } static void OpAFM1 (void) { - AbsoluteLong (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, AbsoluteLong); } static void OpAFM0 (void) { - AbsoluteLong (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, AbsoluteLong); } static void OpBFM1 (void) { - AbsoluteLongIndexedX (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, AbsoluteLongIndexedX); } static void OpBFM0 (void) { - AbsoluteLongIndexedX (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, AbsoluteLongIndexedX); } static void OpA3M1 (void) { - StackRelative (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, StackRelative); } static void OpA3M0 (void) { - StackRelative (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, StackRelative); } static void OpB3M1 (void) { - StackRelativeIndirectIndexed (READ); - LDA8 (); + BINARYOP_MEM_R(LDR, REG_A, uint8, StackRelativeIndirectIndexed); } static void OpB3M0 (void) { - StackRelativeIndirectIndexed (READ); - LDA16 (); + BINARYOP_MEM_R(LDR, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ @@ -1428,207 +1776,156 @@ /* LDX *************************************************************************************** */ static void OpA2X1 (void) { - Registers.XL = *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.XL); + BINARYOP_IMMED(LDR, REG_X, uint8); } static void OpA2X0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.X.W = *(uint16 *) CPU.PC; -#else - Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.X.W); + BINARYOP_IMMED(LDR, REG_X, uint16); } static void OpA6X1 (void) { - Direct (READ); - LDX8 (); + BINARYOP_MEM_R(LDR, REG_X, uint8, Direct); } static void OpA6X0 (void) { - Direct (READ); - LDX16 (); + BINARYOP_MEM_R(LDR, REG_X, uint16, Direct); } static void OpB6X1 (void) { - DirectIndexedY (READ); - LDX8 (); + BINARYOP_MEM_R(LDR, REG_X, uint8, DirectIndexedY); } static void OpB6X0 (void) { - DirectIndexedY (READ); - LDX16 (); + BINARYOP_MEM_R(LDR, REG_X, uint16, DirectIndexedY); } static void OpAEX1 (void) { - Absolute (READ); - LDX8 (); + BINARYOP_MEM_R(LDR, REG_X, uint8, Absolute); } static void OpAEX0 (void) { - Absolute (READ); - LDX16 (); + BINARYOP_MEM_R(LDR, REG_X, uint16, Absolute); } static void OpBEX1 (void) { - AbsoluteIndexedY (READ); - LDX8 (); + BINARYOP_MEM_R(LDR, REG_X, uint8, AbsoluteIndexedY); } static void OpBEX0 (void) { - AbsoluteIndexedY (READ); - LDX16 (); + BINARYOP_MEM_R(LDR, REG_X, uint16, AbsoluteIndexedY); } /**********************************************************************************************/ /* LDY *************************************************************************************** */ static void OpA0X1 (void) { - Registers.YL = *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.YL); + BINARYOP_IMMED(LDR, REG_Y, uint8); } static void OpA0X0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.Y.W = *(uint16 *) CPU.PC; -#else - Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.Y.W); + BINARYOP_IMMED(LDR, REG_Y, uint16); } static void OpA4X1 (void) { - Direct (READ); - LDY8 (); + BINARYOP_MEM_R(LDR, REG_Y, uint8, Direct); } static void OpA4X0 (void) { - Direct (READ); - LDY16 (); + BINARYOP_MEM_R(LDR, REG_Y, uint16, Direct); } static void OpB4X1 (void) { - DirectIndexedX (READ); - LDY8 (); + BINARYOP_MEM_R(LDR, REG_Y, uint8, DirectIndexedX); } static void OpB4X0 (void) { - DirectIndexedX (READ); - LDY16 (); + BINARYOP_MEM_R(LDR, REG_Y, uint16, DirectIndexedX); } static void OpACX1 (void) { - Absolute (READ); - LDY8 (); + BINARYOP_MEM_R(LDR, REG_Y, uint8, Absolute); } static void OpACX0 (void) { - Absolute (READ); - LDY16 (); + BINARYOP_MEM_R(LDR, REG_Y, uint16, Absolute); } static void OpBCX1 (void) { - AbsoluteIndexedX (READ); - LDY8 (); + BINARYOP_MEM_R(LDR, REG_Y, uint8, AbsoluteIndexedX); } static void OpBCX0 (void) { - AbsoluteIndexedX (READ); - LDY16 (); + BINARYOP_MEM_R(LDR, REG_Y, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* LSR *************************************************************************************** */ static void Op4AM1 (void) { - A_LSR8 (); + UNARYOP_REG(LSR, REG_A, uint8); } static void Op4AM0 (void) { - A_LSR16 (); + UNARYOP_REG(LSR, REG_A, uint16); } static void Op46M1 (void) { - Direct (MODIFY); - LSR8 (); + UNARYOP_MEM(LSR, uint8, Direct); } static void Op46M0 (void) { - Direct (MODIFY); - LSR16 (); + UNARYOP_MEM(LSR, uint16, Direct); } static void Op56M1 (void) { - DirectIndexedX (MODIFY); - LSR8 (); + UNARYOP_MEM(LSR, uint8, DirectIndexedX); } static void Op56M0 (void) { - DirectIndexedX (MODIFY); - LSR16 (); + UNARYOP_MEM(LSR, uint16, DirectIndexedX); } static void Op4EM1 (void) { - Absolute (MODIFY); - LSR8 (); + UNARYOP_MEM(LSR, uint8, Absolute); } static void Op4EM0 (void) { - Absolute (MODIFY); - LSR16 (); + UNARYOP_MEM(LSR, uint16, Absolute); } static void Op5EM1 (void) { - AbsoluteIndexedX (MODIFY); - LSR8 (); + UNARYOP_MEM(LSR, uint8, AbsoluteIndexedX); } static void Op5EM0 (void) { - AbsoluteIndexedX (MODIFY); - LSR16 (); + UNARYOP_MEM(LSR, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ @@ -1636,193 +1933,152 @@ /* ORA *************************************************************************************** */ static void Op09M1 (void) { - Registers.AL |= *CPU.PC++; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed; -#endif - SetZN8 (Registers.AL); + BINARYOP_IMMED(ORA, REG_A, uint8); } static void Op09M0 (void) { -#ifdef FAST_LSB_WORD_ACCESS - Registers.A.W |= *(uint16 *) CPU.PC; -#else - Registers.A.W |= *CPU.PC + (*(CPU.PC + 1) << 8); -#endif - CPU.PC += 2; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2; -#endif - SetZN16 (Registers.A.W); + BINARYOP_IMMED(ORA, REG_A, uint16); } static void Op05M1 (void) { - Direct (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, Direct); } static void Op05M0 (void) { - Direct (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, Direct); } static void Op15M1 (void) { - DirectIndexedX (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndexedX); } static void Op15M0 (void) { - DirectIndexedX (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndexedX); } static void Op12M1 (void) { - DirectIndirect (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndirect); } static void Op12M0 (void) { - DirectIndirect (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndirect); } static void Op01M1 (void) { - DirectIndexedIndirect (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndexedIndirect); } static void Op01M0 (void) { - DirectIndexedIndirect (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndexedIndirect); } static void Op11M1 (void) { - DirectIndirectIndexed (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndirectIndexed); } static void Op11M0 (void) { - DirectIndirectIndexed (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndirectIndexed); } static void Op07M1 (void) { - DirectIndirectLong (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndirectLong); } static void Op07M0 (void) { - DirectIndirectLong (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndirectLong); } static void Op17M1 (void) { - DirectIndirectIndexedLong (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, DirectIndirectIndexedLong); } static void Op17M0 (void) { - DirectIndirectIndexedLong (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, DirectIndirectIndexedLong); } static void Op0DM1 (void) { - Absolute (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, Absolute); } static void Op0DM0 (void) { - Absolute (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, Absolute); } static void Op1DM1 (void) { - AbsoluteIndexedX (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, AbsoluteIndexedX); } static void Op1DM0 (void) { - AbsoluteIndexedX (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, AbsoluteIndexedX); } static void Op19M1 (void) { - AbsoluteIndexedY (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, AbsoluteIndexedY); } static void Op19M0 (void) { - AbsoluteIndexedY (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, AbsoluteIndexedY); } static void Op0FM1 (void) { - AbsoluteLong (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, AbsoluteLong); } static void Op0FM0 (void) { - AbsoluteLong (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, AbsoluteLong); } static void Op1FM1 (void) { - AbsoluteLongIndexedX (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, AbsoluteLongIndexedX); } static void Op1FM0 (void) { - AbsoluteLongIndexedX (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, AbsoluteLongIndexedX); } static void Op03M1 (void) { - StackRelative (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, StackRelative); } static void Op03M0 (void) { - StackRelative (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, StackRelative); } static void Op13M1 (void) { - StackRelativeIndirectIndexed (READ); - ORA8 (); + BINARYOP_MEM_R(ORA, REG_A, uint8, StackRelativeIndirectIndexed); } static void Op13M0 (void) { - StackRelativeIndirectIndexed (READ); - ORA16 (); + BINARYOP_MEM_R(ORA, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ @@ -1830,346 +2086,293 @@ /* ROL *************************************************************************************** */ static void Op2AM1 (void) { - A_ROL8 (); + UNARYOP_REG(ROL, REG_A, uint8); } static void Op2AM0 (void) { - A_ROL16 (); + UNARYOP_REG(ROL, REG_A, uint16); } static void Op26M1 (void) { - Direct (MODIFY); - ROL8 (); + UNARYOP_MEM(ROL, uint8, Direct); } static void Op26M0 (void) { - Direct (MODIFY); - ROL16 (); + UNARYOP_MEM(ROL, uint16, Direct); } static void Op36M1 (void) { - DirectIndexedX (MODIFY); - ROL8 (); + UNARYOP_MEM(ROL, uint8, DirectIndexedX); } static void Op36M0 (void) { - DirectIndexedX (MODIFY); - ROL16 (); + UNARYOP_MEM(ROL, uint16, DirectIndexedX); } static void Op2EM1 (void) { - Absolute (MODIFY); - ROL8 (); + UNARYOP_MEM(ROL, uint8, Absolute); } static void Op2EM0 (void) { - Absolute (MODIFY); - ROL16 (); + UNARYOP_MEM(ROL, uint16, Absolute); } static void Op3EM1 (void) { - AbsoluteIndexedX (MODIFY); - ROL8 (); + UNARYOP_MEM(ROL, uint8, AbsoluteIndexedX); } static void Op3EM0 (void) { - AbsoluteIndexedX (MODIFY); - ROL16 (); + UNARYOP_MEM(ROL, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* ROR *************************************************************************************** */ static void Op6AM1 (void) { - A_ROR8 (); + UNARYOP_REG(ROR, REG_A, uint8); } static void Op6AM0 (void) { - A_ROR16 (); + UNARYOP_REG(ROR, REG_A, uint16); } static void Op66M1 (void) { - Direct (MODIFY); - ROR8 (); + UNARYOP_MEM(ROR, uint8, Direct); } static void Op66M0 (void) { - Direct (MODIFY); - ROR16 (); + UNARYOP_MEM(ROR, uint16, Direct); } static void Op76M1 (void) { - DirectIndexedX (MODIFY); - ROR8 (); + UNARYOP_MEM(ROR, uint8, DirectIndexedX); } static void Op76M0 (void) { - DirectIndexedX (MODIFY); - ROR16 (); + UNARYOP_MEM(ROR, uint16, DirectIndexedX); } static void Op6EM1 (void) { - Absolute (MODIFY); - ROR8 (); + UNARYOP_MEM(ROR, uint8, Absolute); } static void Op6EM0 (void) { - Absolute (MODIFY); - ROR16 (); + UNARYOP_MEM(ROR, uint16, Absolute); } static void Op7EM1 (void) { - AbsoluteIndexedX (MODIFY); - ROR8 (); + UNARYOP_MEM(ROR, uint8, AbsoluteIndexedX); } static void Op7EM0 (void) { - AbsoluteIndexedX (MODIFY); - ROR16 (); + UNARYOP_MEM(ROR, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ /* SBC *************************************************************************************** */ static void OpE9M1 (void) { - Immediate8 (READ); - SBC8 (); + BINARYOP_IMMED(SBC, REG_A, uint8); } static void OpE9M0 (void) { - Immediate16 (READ); - SBC16 (); + BINARYOP_IMMED(SBC, REG_A, uint16); } static void OpE5M1 (void) { - Direct (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, Direct); } static void OpE5M0 (void) { - Direct (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, Direct); } static void OpF5M1 (void) { - DirectIndexedX (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndexedX); } static void OpF5M0 (void) { - DirectIndexedX (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndexedX); } static void OpF2M1 (void) { - DirectIndirect (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndirect); } static void OpF2M0 (void) { - DirectIndirect (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndirect); } static void OpE1M1 (void) { - DirectIndexedIndirect (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndexedIndirect); } static void OpE1M0 (void) { - DirectIndexedIndirect (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndexedIndirect); } static void OpF1M1 (void) { - DirectIndirectIndexed (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndirectIndexed); } static void OpF1M0 (void) { - DirectIndirectIndexed (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndirectIndexed); } static void OpE7M1 (void) { - DirectIndirectLong (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndirectLong); } static void OpE7M0 (void) { - DirectIndirectLong (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndirectLong); } static void OpF7M1 (void) { - DirectIndirectIndexedLong (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, DirectIndirectIndexedLong); } static void OpF7M0 (void) { - DirectIndirectIndexedLong (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, DirectIndirectIndexedLong); } static void OpEDM1 (void) { - Absolute (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, Absolute); } static void OpEDM0 (void) { - Absolute (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, Absolute); } static void OpFDM1 (void) { - AbsoluteIndexedX (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, AbsoluteIndexedX); } static void OpFDM0 (void) { - AbsoluteIndexedX (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, AbsoluteIndexedX); } static void OpF9M1 (void) { - AbsoluteIndexedY (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, AbsoluteIndexedY); } static void OpF9M0 (void) { - AbsoluteIndexedY (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, AbsoluteIndexedY); } static void OpEFM1 (void) { - AbsoluteLong (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, AbsoluteLong); } static void OpEFM0 (void) { - AbsoluteLong (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, AbsoluteLong); } static void OpFFM1 (void) { - AbsoluteLongIndexedX (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, AbsoluteLongIndexedX); } static void OpFFM0 (void) { - AbsoluteLongIndexedX (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, AbsoluteLongIndexedX); } static void OpE3M1 (void) { - StackRelative (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, StackRelative); } static void OpE3M0 (void) { - StackRelative (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, StackRelative); } static void OpF3M1 (void) { - StackRelativeIndirectIndexed (READ); - SBC8 (); + BINARYOP_MEM_R(SBC, REG_A, uint8, StackRelativeIndirectIndexed); } static void OpF3M0 (void) { - StackRelativeIndirectIndexed (READ); - SBC16 (); + BINARYOP_MEM_R(SBC, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ /* STA *************************************************************************************** */ static void Op85M1 (void) { - Direct (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, Direct); } static void Op85M0 (void) { - Direct (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, Direct); } static void Op95M1 (void) { - DirectIndexedX (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndexedX); } static void Op95M0 (void) { - DirectIndexedX (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndexedX); } static void Op92M1 (void) { - DirectIndirect (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndirect); } static void Op92M0 (void) { - DirectIndirect (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndirect); } static void Op81M1 (void) { - DirectIndexedIndirect (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndexedIndirect); #ifdef noVAR_CYCLES if (CheckIndex ()) CPU.Cycles += ONE_CYCLE; @@ -2178,8 +2381,7 @@ static void Op81M0 (void) { - DirectIndexedIndirect (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndexedIndirect); #ifdef noVAR_CYCLES if (CheckIndex ()) CPU.Cycles += ONE_CYCLE; @@ -2188,248 +2390,208 @@ static void Op91M1 (void) { - DirectIndirectIndexed (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndirectIndexed); } static void Op91M0 (void) { - DirectIndirectIndexed (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndirectIndexed); } static void Op87M1 (void) { - DirectIndirectLong (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndirectLong); } static void Op87M0 (void) { - DirectIndirectLong (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndirectLong); } static void Op97M1 (void) { - DirectIndirectIndexedLong (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, DirectIndirectIndexedLong); } static void Op97M0 (void) { - DirectIndirectIndexedLong (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, DirectIndirectIndexedLong); } static void Op8DM1 (void) { - Absolute (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, Absolute); } static void Op8DM0 (void) { - Absolute (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, Absolute); } static void Op9DM1 (void) { - AbsoluteIndexedX (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, AbsoluteIndexedX); } static void Op9DM0 (void) { - AbsoluteIndexedX (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, AbsoluteIndexedX); } static void Op99M1 (void) { - AbsoluteIndexedY (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, AbsoluteIndexedY); } static void Op99M0 (void) { - AbsoluteIndexedY (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, AbsoluteIndexedY); } static void Op8FM1 (void) { - AbsoluteLong (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, AbsoluteLong); } static void Op8FM0 (void) { - AbsoluteLong (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, AbsoluteLong); } static void Op9FM1 (void) { - AbsoluteLongIndexedX (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, AbsoluteLongIndexedX); } static void Op9FM0 (void) { - AbsoluteLongIndexedX (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, AbsoluteLongIndexedX); } static void Op83M1 (void) { - StackRelative (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, StackRelative); } static void Op83M0 (void) { - StackRelative (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, StackRelative); } static void Op93M1 (void) { - StackRelativeIndirectIndexed (WRITE); - STA8 (); + BINARYOP_MEM_W(STR, REG_A, uint8, StackRelativeIndirectIndexed); } static void Op93M0 (void) { - StackRelativeIndirectIndexed (WRITE); - STA16 (); + BINARYOP_MEM_W(STR, REG_A, uint16, StackRelativeIndirectIndexed); } /**********************************************************************************************/ /* STX *************************************************************************************** */ static void Op86X1 (void) { - Direct (WRITE); - STX8 (); + BINARYOP_MEM_W(STR, REG_X, uint8, Direct); } static void Op86X0 (void) { - Direct (WRITE); - STX16 (); + BINARYOP_MEM_W(STR, REG_X, uint16, Direct); } static void Op96X1 (void) { - DirectIndexedY (WRITE); - STX8 (); + BINARYOP_MEM_W(STR, REG_X, uint8, DirectIndexedY); } static void Op96X0 (void) { - DirectIndexedY (WRITE); - STX16 (); + BINARYOP_MEM_W(STR, REG_X, uint16, DirectIndexedY); } static void Op8EX1 (void) { - Absolute (WRITE); - STX8 (); + BINARYOP_MEM_W(STR, REG_X, uint8, Absolute); } static void Op8EX0 (void) { - Absolute (WRITE); - STX16 (); + BINARYOP_MEM_W(STR, REG_X, uint16, Absolute); } /**********************************************************************************************/ /* STY *************************************************************************************** */ static void Op84X1 (void) { - Direct (WRITE); - STY8 (); + BINARYOP_MEM_W(STR, REG_Y, uint8, Direct); } static void Op84X0 (void) { - Direct (WRITE); - STY16 (); + BINARYOP_MEM_W(STR, REG_Y, uint16, Direct); } static void Op94X1 (void) { - DirectIndexedX (WRITE); - STY8 (); + BINARYOP_MEM_W(STR, REG_Y, uint8, DirectIndexedX); } static void Op94X0 (void) { - DirectIndexedX (WRITE); - STY16 (); + BINARYOP_MEM_W(STR, REG_Y, uint16, DirectIndexedX); } static void Op8CX1 (void) { - Absolute (WRITE); - STY8 (); + BINARYOP_MEM_W(STR, REG_Y, uint8, Absolute); } static void Op8CX0 (void) { - Absolute (WRITE); - STY16 (); + BINARYOP_MEM_W(STR, REG_Y, uint16, Absolute); } /**********************************************************************************************/ /* STZ *************************************************************************************** */ static void Op64M1 (void) { - Direct (WRITE); - STZ8 (); + UNARYOP_MEM(STZ, uint8, Direct); } static void Op64M0 (void) { - Direct (WRITE); - STZ16 (); + UNARYOP_MEM(STZ, uint16, Direct); } static void Op74M1 (void) { - DirectIndexedX (WRITE); - STZ8 (); + UNARYOP_MEM(STZ, uint8, DirectIndexedX); } static void Op74M0 (void) { - DirectIndexedX (WRITE); - STZ16 (); + UNARYOP_MEM(STZ, uint16, DirectIndexedX); } static void Op9CM1 (void) { - Absolute (WRITE); - STZ8 (); + UNARYOP_MEM(STZ, uint8, Absolute); } static void Op9CM0 (void) { - Absolute (WRITE); - STZ16 (); + UNARYOP_MEM(STZ, uint16, Absolute); } static void Op9EM1 (void) { - AbsoluteIndexedX (WRITE); - STZ8 (); + UNARYOP_MEM(STZ, uint8, AbsoluteIndexedX); } static void Op9EM0 (void) { - AbsoluteIndexedX (WRITE); - STZ16 (); + UNARYOP_MEM(STZ, uint16, AbsoluteIndexedX); } /**********************************************************************************************/ @@ -2437,52 +2599,44 @@ /* TRB *************************************************************************************** */ static void Op14M1 (void) { - Direct (MODIFY); - TRB8 (); + BINARYOP_MEM_RW(TRB, REG_A, uint8, Direct); } static void Op14M0 (void) { - Direct (MODIFY); - TRB16 (); + BINARYOP_MEM_RW(TRB, REG_A, uint16, Direct); } static void Op1CM1 (void) { - Absolute (MODIFY); - TRB8 (); + BINARYOP_MEM_RW(TRB, REG_A, uint8, Absolute); } static void Op1CM0 (void) { - Absolute (MODIFY); - TRB16 (); + BINARYOP_MEM_RW(TRB, REG_A, uint16, Absolute); } /**********************************************************************************************/ /* TSB *************************************************************************************** */ static void Op04M1 (void) { - Direct (MODIFY); - TSB8 (); + BINARYOP_MEM_RW(TSB, REG_A, uint8, Direct); } static void Op04M0 (void) { - Direct (MODIFY); - TSB16 (); + BINARYOP_MEM_RW(TSB, REG_A, uint16, Direct); } static void Op0CM1 (void) { - Absolute (MODIFY); - TSB8 (); + BINARYOP_MEM_RW(TSB, REG_A, uint8, Absolute); } static void Op0CM0 (void) { - Absolute (MODIFY); - TSB16 (); + BINARYOP_MEM_RW(TSB, REG_A, uint16, Absolute); } /**********************************************************************************************/ @@ -2526,7 +2680,7 @@ if (Settings.SoundSkipMethod == 1)\ CPU.PC = CPU.PCBase + OpAddress;\ if (Settings.SoundSkipMethod == 3)\ - if (CPU.PC - CPU.PCBase > OpAddress)\ + if ( CPU.PC - CPU.PCBase > OpAddress)\ return;\ else\ CPU.PC = CPU.PCBase + OpAddress;\ @@ -2594,132 +2748,114 @@ /* BCC */ static void Op90 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck0 (); if (!CheckCarry ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BCS */ static void OpB0 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck0 (); if (CheckCarry ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BEQ */ static void OpF0 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck2 (); if (CheckZero ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BMI */ static void Op30 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck1 (); if (CheckNegative ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BNE */ static void OpD0 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck1 (); if (!CheckZero ()) { - CPU.PC = CPU.PCBase + OpAddress; + CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + Cycles1(); + CPUShutdown (); } } /* BPL */ static void Op10 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck1 (); if (!CheckNegative ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BRA */ static void Op80 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); CPUShutdown (); } /* BVC */ static void Op50 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck0 (); if (!CheckOverflow ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /* BVS */ static void Op70 (void) { - Relative (JUMP); + long OpAddress = Relative (JUMP); BranchCheck0 (); if (CheckOverflow ()) { - CPU.PC = CPU.PCBase + OpAddress; -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif - CPUShutdown (); + CPU.PC = CPU.PCBase + OpAddress; + Cycles1(); + CPUShutdown (); } } /**********************************************************************************************/ @@ -2729,27 +2865,21 @@ static void Op18 (void) { ClearCarry (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /* CLD */ static void OpD8 (void) { ClearDecimal (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /* CLI */ static void Op58 (void) { ClearIRQ (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); /* CHECK_FOR_IRQ(); */ } @@ -2757,127 +2887,14 @@ static void OpB8 (void) { ClearOverflow (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -} -/**********************************************************************************************/ - -/* DEX/DEY *********************************************************************************** */ -static void OpCAX1 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.XL--; - SetZN8 (Registers.XL); -} - -static void OpCAX0 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.X.W--; - SetZN16 (Registers.X.W); -} - -static void Op88X1 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.YL--; - SetZN8 (Registers.YL); -} - -static void Op88X0 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.Y.W--; - SetZN16 (Registers.Y.W); -} -/**********************************************************************************************/ - -/* INX/INY *********************************************************************************** */ -static void OpE8X1 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.XL++; - SetZN8 (Registers.XL); -} - -static void OpE8X0 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.X.W++; - SetZN16 (Registers.X.W); -} - -static void OpC8X1 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.YL++; - SetZN8 (Registers.YL); -} - -static void OpC8X0 (void) -{ -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif -#ifdef CPU_SHUTDOWN - CPU.WaitAddress = NULL; -#endif - - Registers.Y.W++; - SetZN16 (Registers.Y.W); + Cycles1(); } - /**********************************************************************************************/ /* NOP *************************************************************************************** */ static void OpEA (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /**********************************************************************************************/ @@ -2887,67 +2904,68 @@ * S9xSetWord (w, Registers.S.W - 1);\ * Registers.S.W -= 2; */ -#define PushB(b)\ +static inline void PushB(uint8 b) +{ S9xSetByte (b, Registers.S.W--); - -#define PushBE(b)\ - S9xSetByte (b, Registers.S.W--);\ +} +static inline void PushBE(uint8 b) +{ + S9xSetByte (b, Registers.S.W--); Registers.SH=0x01; +} - -#define PushW(w) \ - S9xSetByte ((w)>>8, Registers.S.W);\ - S9xSetByte ((w)&0xff, (Registers.S.W - 1)&0xFFFF);\ +static inline void PushW(uint16 w) +{ + S9xSetByte ((w)>>8, Registers.S.W); + S9xSetByte ((w)&0xff, (Registers.S.W - 1)&0xFFFF); Registers.S.W -= 2; +} -#define PushWE(w) \ - S9xSetByte ((w)>>8, Registers.S.W--);\ - Registers.SH=0x01;\ - S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\ +static inline void PushWE(uint16 w) +{ + S9xSetByte ((w)>>8, Registers.S.W--); + Registers.SH=0x01; + S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF); Registers.SH = 0x01; - -#define PushWENew(w) \ - S9xSetByte ((w)>>8, Registers.S.W--);\ - S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\ +} +static inline void PushWENew(uint16 w) +{ + S9xSetByte ((w)>>8, Registers.S.W--); + S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF); Registers.SH = 0x01; +} //PEA NL static void OpF4E1 (void) { - Absolute (NONE); - PushWENew ((unsigned short)OpAddress); + PushWENew ((unsigned short)Absolute (NONE)); } static void OpF4 (void) { - Absolute (NONE); - PushW ((unsigned short)OpAddress); + PushW ((unsigned short)Absolute (NONE)); } //PEI NL static void OpD4E1 (void) { - DirectIndirect (NONE); - PushWENew ((unsigned short)OpAddress); + PushWENew ((unsigned short)DirectIndirect (NONE)); } static void OpD4 (void) { - DirectIndirect (NONE); - PushW ((unsigned short)OpAddress); + PushW ((unsigned short)DirectIndirect (NONE)); } //PER NL static void Op62E1 (void) { - RelativeLong (NONE); - PushWENew ((unsigned short)OpAddress); + PushWENew ((unsigned short)RelativeLong (NONE)); } static void Op62 (void) { - RelativeLong (NONE); - PushW ((unsigned short)OpAddress); + PushW ((unsigned short)RelativeLong (NONE)); } @@ -2955,75 +2973,57 @@ static void Op48E1 (void) { PushBE (Registers.AL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op48M1 (void) { PushB (Registers.AL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op48M0 (void) { PushW (Registers.A.W); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHB static void Op8BE1 (void) { PushBE (Registers.DB); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op8B (void) { PushB (Registers.DB); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHD NL static void Op0BE1 (void) { PushWENew (Registers.D.W); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op0B (void) { PushW (Registers.D.W); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHK static void Op4BE1 (void) { PushBE (Registers.PB); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op4B (void) { PushB (Registers.PB); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHP @@ -3031,175 +3031,147 @@ { S9xPackStatus (); PushBE (Registers.PL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op08 (void) { S9xPackStatus (); PushB (Registers.PL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHX static void OpDAE1 (void) { PushBE (Registers.XL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void OpDAX1 (void) { PushB (Registers.XL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void OpDAX0 (void) { PushW (Registers.X.W); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //PHY static void Op5AE1 (void) { PushBE (Registers.YL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op5AX1 (void) { PushB (Registers.YL); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op5AX0 (void) { PushW (Registers.Y.W); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /**********************************************************************************************/ /* PULL Instructions ************************************************************************* */ -#define PullW(w) \ - w = S9xGetByte (++Registers.S.W); \ - w |= (S9xGetByte (++Registers.S.W)<<8); - -/* w = S9xGetWord (Registers.S.W + 1); \ - Registers.S.W += 2; -*/ - -#define PullB(b)\ - b = S9xGetByte (++Registers.S.W); - -#define PullBE(b)\ - Registers.S.W++;\ - Registers.SH=0x01;\ +static inline void PullW(uint16& w) +{ + uint16 tmp = S9xGetByte (Registers.S.W + 1); + tmp |= S9xGetByte (Registers.S.W + 2) << 8; + /* was S9xGetWord() - why not anymore? */ + Registers.S.W += 2; + w = tmp; +} +static inline void PullB(uint8& b) +{ + b = S9xGetByte (++Registers.S.W); +} +static inline void PullBE(uint8& b) +{ + Registers.S.W++; + Registers.SH=0x01; b = S9xGetByte (Registers.S.W); - -#define PullWE(w) \ - Registers.S.W++;\ - Registers.SH=0x01;\ - w = S9xGetByte (Registers.S.W); \ - Registers.S.W++; \ - Registers.SH=0x01;\ +} +static inline void PullWE(uint16& w) +{ + Registers.S.W++; + Registers.SH=0x01; + w = S9xGetByte (Registers.S.W); + Registers.S.W++; + Registers.SH=0x01; w |= (S9xGetByte (Registers.S.W)<<8); - -#define PullWENew(w) \ - PullW(w);\ - Registers.SH=0x01; +} +static inline void PullWENew(uint16& w) +{ + PullW(w); + Registers.SH=0x01; +} //PLA static void Op68E1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullBE (Registers.AL); - SetZN8 (Registers.AL); + SetZN (Registers.AL); } static void Op68M1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullB (Registers.AL); - SetZN8 (Registers.AL); + SetZN (Registers.AL); } static void Op68M0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullW (Registers.A.W); - SetZN16 (Registers.A.W); + SetZN (Registers.A.W); } //PLB static void OpABE1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullBE (Registers.DB); - SetZN8 (Registers.DB); + SetZN (Registers.DB); ICPU.ShiftedDB = Registers.DB << 16; } static void OpAB (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullB (Registers.DB); - SetZN8 (Registers.DB); + SetZN (Registers.DB); ICPU.ShiftedDB = Registers.DB << 16; } -/* PHP */ -//PLD NL +/* PLD */ static void Op2BE1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullWENew (Registers.D.W); - SetZN16 (Registers.D.W); + SetZN (Registers.D.W); } static void Op2B (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullW (Registers.D.W); - SetZN16 (Registers.D.W); + SetZN (Registers.D.W); } /* PLP */ static void Op28E1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullBE (Registers.PL); S9xUnpackStatus (); @@ -3214,9 +3186,7 @@ static void Op28 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullB (Registers.PL); S9xUnpackStatus (); @@ -3232,57 +3202,45 @@ //PLX static void OpFAE1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullBE (Registers.XL); - SetZN8 (Registers.XL); + SetZN (Registers.XL); } static void OpFAX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullB (Registers.XL); - SetZN8 (Registers.XL); + SetZN (Registers.XL); } static void OpFAX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullW (Registers.X.W); - SetZN16 (Registers.X.W); + SetZN (Registers.X.W); } //PLY static void Op7AE1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullBE (Registers.YL); - SetZN8 (Registers.YL); + SetZN (Registers.YL); } static void Op7AX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullB (Registers.YL); - SetZN8 (Registers.YL); + SetZN (Registers.YL); } static void Op7AX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); PullW (Registers.Y.W); - SetZN16 (Registers.Y.W); + SetZN (Registers.Y.W); } /**********************************************************************************************/ @@ -3292,18 +3250,14 @@ static void Op38 (void) { SetCarry (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /* SED */ static void OpF8 (void) { SetDecimal (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); missing.decimal_mode = 1; } @@ -3311,9 +3265,7 @@ static void Op78 (void) { SetIRQ (); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /**********************************************************************************************/ @@ -3321,57 +3273,45 @@ /* TAX8 */ static void OpAAX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.XL = Registers.AL; - SetZN8 (Registers.XL); + SetZN (Registers.XL); } /* TAX16 */ static void OpAAX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.X.W = Registers.A.W; - SetZN16 (Registers.X.W); + SetZN (Registers.X.W); } /* TAY8 */ static void OpA8X1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.YL = Registers.AL; - SetZN8 (Registers.YL); + SetZN (Registers.YL); } /* TAY16 */ static void OpA8X0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.Y.W = Registers.A.W; - SetZN16 (Registers.Y.W); + SetZN (Registers.Y.W); } static void Op5B (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.D.W = Registers.A.W; - SetZN16 (Registers.D.W); + SetZN (Registers.D.W); } static void Op1B (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.S.W = Registers.A.W; if (CheckEmulation()) Registers.SH = 1; @@ -3379,63 +3319,49 @@ static void Op7B (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.A.W = Registers.D.W; - SetZN16 (Registers.A.W); + SetZN (Registers.A.W); } static void Op3B (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.A.W = Registers.S.W; - SetZN16 (Registers.A.W); + SetZN (Registers.A.W); } static void OpBAX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.XL = Registers.SL; - SetZN8 (Registers.XL); + SetZN (Registers.XL); } static void OpBAX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.X.W = Registers.S.W; - SetZN16 (Registers.X.W); + SetZN (Registers.X.W); } static void Op8AM1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.AL = Registers.XL; - SetZN8 (Registers.AL); + SetZN (Registers.AL); } static void Op8AM0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.A.W = Registers.X.W; - SetZN16 (Registers.A.W); + SetZN (Registers.A.W); } static void Op9A (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.S.W = Registers.X.W; if (CheckEmulation()) Registers.SH = 1; @@ -3443,56 +3369,44 @@ static void Op9BX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.YL = Registers.XL; - SetZN8 (Registers.YL); + SetZN (Registers.YL); } static void Op9BX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.Y.W = Registers.X.W; - SetZN16 (Registers.Y.W); + SetZN (Registers.Y.W); } static void Op98M1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.AL = Registers.YL; - SetZN8 (Registers.AL); + SetZN (Registers.AL); } static void Op98M0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.A.W = Registers.Y.W; - SetZN16 (Registers.A.W); + SetZN (Registers.A.W); } static void OpBBX1 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.XL = Registers.YL; - SetZN8 (Registers.XL); + SetZN (Registers.XL); } static void OpBBX0 (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); Registers.X.W = Registers.Y.W; - SetZN16 (Registers.X.W); + SetZN (Registers.X.W); } /**********************************************************************************************/ @@ -3500,12 +3414,10 @@ /* XCE *************************************************************************************** */ static void OpFB (void) { -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); - A1 = ICPU._Carry; - A2 = Registers.PH; + uint8 A1 = ICPU._Carry; + uint8 A2 = Registers.PH; ICPU._Carry = A2 & 1; Registers.PH = A1; @@ -3549,9 +3461,7 @@ Registers.PB = 0; ICPU.ShiftedPB = 0; S9xSetPCBase (S9xGetWord (0xFFE6)); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } else { @@ -3565,9 +3475,7 @@ Registers.PB = 0; ICPU.ShiftedPB = 0; S9xSetPCBase (S9xGetWord (0xFFFE)); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } } /**********************************************************************************************/ @@ -3575,8 +3483,7 @@ /* BRL ************************************************************************************** */ static void Op82 (void) { - RelativeLong (JUMP); - S9xSetPCBase (ICPU.ShiftedPB + OpAddress); + S9xSetPCBase (ICPU.ShiftedPB + RelativeLong (JUMP)); } /**********************************************************************************************/ @@ -3609,9 +3516,7 @@ else S9xSetPCBase (S9xGetWord (0xFFEE)); #endif -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } else { @@ -3634,9 +3539,7 @@ else S9xSetPCBase (S9xGetWord (0xFFFE)); #endif -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } } @@ -3671,9 +3574,7 @@ else S9xSetPCBase (S9xGetWord (0xFFEA)); #endif -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } else { @@ -3696,9 +3597,7 @@ else S9xSetPCBase (S9xGetWord (0xFFFA)); #endif -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } } /**********************************************************************************************/ @@ -3723,9 +3622,7 @@ Registers.PB = 0; ICPU.ShiftedPB = 0; S9xSetPCBase (S9xGetWord (0xFFE4)); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } else { @@ -3739,9 +3636,7 @@ Registers.PB = 0; ICPU.ShiftedPB = 0; S9xSetPCBase (S9xGetWord (0xFFF4)); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } } /**********************************************************************************************/ @@ -3749,18 +3644,16 @@ /* JML *************************************************************************************** */ static void OpDC (void) { - AbsoluteIndirectLong (JUMP); + long OpAddress = AbsoluteIndirectLong (JUMP); Registers.PB = (uint8) (OpAddress >> 16); ICPU.ShiftedPB = OpAddress & 0xff0000; S9xSetPCBase (OpAddress); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } static void Op5C (void) { - AbsoluteLong (JUMP); + long OpAddress = AbsoluteLong (JUMP); Registers.PB = (uint8) (OpAddress >> 16); ICPU.ShiftedPB = OpAddress & 0xff0000; S9xSetPCBase (OpAddress); @@ -3770,7 +3663,7 @@ /* JMP *************************************************************************************** */ static void Op4C (void) { - Absolute (JUMP); + long OpAddress = Absolute (JUMP); S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff)); #if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES) CPUShutdown (); @@ -3779,24 +3672,22 @@ static void Op6C (void) { - AbsoluteIndirect (JUMP); + long OpAddress = AbsoluteIndirect (JUMP); S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff)); } static void Op7C (void) { - AbsoluteIndexedIndirect (JUMP); + long OpAddress = AbsoluteIndexedIndirect (JUMP); S9xSetPCBase (ICPU.ShiftedPB + OpAddress); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } /**********************************************************************************************/ /* JSL/RTL *********************************************************************************** */ static void Op22E1 (void) { - AbsoluteLong (JUMP); + long OpAddress = AbsoluteLong (JUMP); PushB (Registers.PB); PushWENew (CPU.PC - CPU.PCBase - 1); Registers.PB = (uint8) (OpAddress >> 16); @@ -3806,7 +3697,7 @@ static void Op22 (void) { - AbsoluteLong (JUMP); + long OpAddress = AbsoluteLong (JUMP); PushB (Registers.PB); PushW (CPU.PC - CPU.PCBase - 1); Registers.PB = (uint8) (OpAddress >> 16); @@ -3820,9 +3711,7 @@ PullB (Registers.PB); ICPU.ShiftedPB = Registers.PB << 16; S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff)); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } static void Op6B (void) @@ -3831,51 +3720,41 @@ PullB (Registers.PB); ICPU.ShiftedPB = Registers.PB << 16; S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff)); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } /**********************************************************************************************/ /* JSR/RTS *********************************************************************************** */ static void Op20 (void) { - Absolute (JUMP); + long OpAddress = Absolute (JUMP); PushW (CPU.PC - CPU.PCBase - 1); S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff)); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } //JSR a,x static void OpFCE1 (void) { - AbsoluteIndexedIndirect (JUMP); + long OpAddress = AbsoluteIndexedIndirect (JUMP); PushWENew (CPU.PC - CPU.PCBase - 1); S9xSetPCBase (ICPU.ShiftedPB + OpAddress); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void OpFC (void) { - AbsoluteIndexedIndirect (JUMP); + long OpAddress = AbsoluteIndexedIndirect (JUMP); PushW (CPU.PC - CPU.PCBase - 1); S9xSetPCBase (ICPU.ShiftedPB + OpAddress); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE; -#endif + Cycles1(); } static void Op60 (void) { PullW (Registers.PC); S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff)); -#ifndef SA1_OPCODES - CPU.Cycles += ONE_CYCLE * 3; -#endif + Cycles3(); } /**********************************************************************************************/ @@ -3885,9 +3764,7 @@ { uint32 SrcBank; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; -#endif + CyclesM2p2(); Registers.DB = *CPU.PC++; ICPU.ShiftedDB = Registers.DB << 16; @@ -3907,9 +3784,7 @@ { uint32 SrcBank; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; -#endif + CyclesM2p2(); Registers.DB = *CPU.PC++; ICPU.ShiftedDB = Registers.DB << 16; @@ -3929,9 +3804,7 @@ { uint32 SrcBank; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; -#endif + CyclesM2p2(); Registers.DB = *CPU.PC++; ICPU.ShiftedDB = Registers.DB << 16; OpenBus = SrcBank = *CPU.PC++; @@ -3949,9 +3822,7 @@ { uint32 SrcBank; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; -#endif + CyclesM2p2(); Registers.DB = *CPU.PC++; ICPU.ShiftedDB = Registers.DB << 16; OpenBus = SrcBank = *CPU.PC++; @@ -3970,16 +3841,16 @@ /* REP/SEP *********************************************************************************** */ static void OpC2 (void) { - Work8 = ~*CPU.PC++; + uint8 Work8 = ~ImmedGet8(); + Registers.PL &= Work8; ICPU._Carry &= Work8; ICPU._Overflow &= (Work8 >> 6); ICPU._Negative &= Work8; ICPU._Zero |= ~Work8 & Zero; + + Cycles1(); -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed + ONE_CYCLE; -#endif if (CheckEmulation()) { SetFlags (MemoryFlag | IndexFlag); @@ -3996,16 +3867,17 @@ static void OpE2 (void) { - Work8 = *CPU.PC++; + uint8 Work8 = ImmedGet8(); + Registers.PL |= Work8; ICPU._Carry |= Work8 & 1; ICPU._Overflow |= (Work8 >> 6) & 1; ICPU._Negative |= Work8; + + Cycles1(); + if (Work8 & Zero) ICPU._Zero = 0; -#ifndef SA1_OPCODES - CPU.Cycles += CPU.MemSpeed + ONE_CYCLE; -#endif if (CheckEmulation()) { SetFlags (MemoryFlag | IndexFlag); @@ -4023,14 +3895,12 @@ /* XBA *************************************************************************************** */ static void OpEB (void) { - Work8 = Registers.AL; + uint8 Work8 = Registers.AL; Registers.AL = Registers.AH; Registers.AH = Work8; - SetZN8 (Registers.AL); -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + SetZN (Registers.AL); + Cycles2(); } /**********************************************************************************************/ @@ -4057,9 +3927,7 @@ Registers.XH = 0; Registers.YH = 0; } -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); S9xFixCycles(); /* CHECK_FOR_IRQ(); */ } @@ -4096,9 +3964,7 @@ if (CPU.IRQActive) { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif + Cycles2(); } else #endif @@ -4121,11 +3987,9 @@ } else { -#ifndef SA1_OPCODES - CPU.Cycles += TWO_CYCLES; -#endif -#endif + Cycles2(); } +#endif } #endif // SA1_OPCODES } diff -NaHudr snes9x/snes9x/dsp4.h snes9x2/snes9x/dsp4.h --- snes9x/snes9x/dsp4.h 2004-04-18 23:24:57.000000000 +0300 +++ snes9x2/snes9x/dsp4.h 2004-06-15 14:00:01.000000000 +0300 @@ -157,4 +157,4 @@ int8 op06_index; // index into OAM table int8 op06_offset; // offset into OAM table -#endif \ No newline at end of file +#endif diff -NaHudr snes9x/snes9x/dsp4emu.cpp snes9x2/snes9x/dsp4emu.cpp --- snes9x/snes9x/dsp4emu.cpp 2004-04-18 23:24:57.000000000 +0300 +++ snes9x2/snes9x/dsp4emu.cpp 2004-06-15 13:59:52.000000000 +0300 @@ -666,6 +666,9 @@ int16 index=0, lcv; int16 left_inc=0,right_inc=0; int16 dx1,dx2,dx3,dx4; + /* Note: gcc complains about dx1 and dx2 being unused, + * but that's not really case - Bisqwit + */ // # segments to traverse segments = abs(y_left - path_y[0]); diff -NaHudr snes9x/snes9x/getset.h snes9x2/snes9x/getset.h --- snes9x/snes9x/getset.h 2003-12-17 22:38:40.000000000 +0200 +++ snes9x2/snes9x/getset.h 2004-06-16 01:01:12.000000000 +0300 @@ -89,6 +89,7 @@ extern uint8 OpenBus; } + INLINE uint8 S9xGetByte (uint32 Address) { int block; @@ -203,12 +204,7 @@ if (Memory.BlockIsRAM [block]) CPU.WaitAddress = CPU.PCAtOpcodeStart; #endif -#ifdef FAST_LSB_WORD_ACCESS - return (*(uint16 *) (GetAddress + (Address & 0xffff))); -#else - return (*(GetAddress + (Address & 0xffff)) | - (*(GetAddress + (Address & 0xffff) + 1) << 8)); -#endif + return ReadU16(GetAddress + (Address & 0xffff)); } switch ((int) GetAddress) @@ -252,12 +248,7 @@ (((Address + 1) & 0xf0000) >> 3)) & Memory.SRAMMask)) << 8)); case CMemory::MAP_BWRAM: -#ifdef FAST_LSB_WORD_ACCESS - return (*(uint16 *) (Memory.BWRAM + ((Address & 0x7fff) - 0x6000))); -#else - return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) | - (*(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) << 8)); -#endif + return ReadU16(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)); case CMemory::MAP_C4: return (S9xGetC4 (Address & 0xffff) | @@ -451,19 +442,9 @@ SA1.Executing = SA1.S9xOpcodes != NULL; SA1.WaitCounter = 0; } -#ifdef FAST_LSB_WORD_ACCESS - *(uint16 *) SetAddress = Word; -#else - *SetAddress = (uint8) Word; - *(SetAddress + 1) = Word >> 8; -#endif -#else -#ifdef FAST_LSB_WORD_ACCESS - *(uint16 *) (SetAddress + (Address & 0xffff)) = Word; + WriteU16(SetAddress, Word); #else - *(SetAddress + (Address & 0xffff)) = (uint8) Word; - *(SetAddress + ((Address + 1) & 0xffff)) = Word >> 8; -#endif + WriteU16(SetAddress + (Address & 0xffff), Word); #endif return; } @@ -518,12 +499,7 @@ return; case CMemory::MAP_BWRAM: -#ifdef FAST_LSB_WORD_ACCESS - *(uint16 *) (Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Word; -#else - *(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = (uint8) Word; - *(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) = (uint8) (Word >> 8); -#endif + WriteU16(Memory.BWRAM + ((Address & 0x7fff) - 0x6000), Word); CPU.SRAMModified = TRUE; return; diff -NaHudr snes9x/snes9x/gfx.h snes9x2/snes9x/gfx.h --- snes9x/snes9x/gfx.h 2004-03-06 07:39:21.000000000 +0200 +++ snes9x2/snes9x/gfx.h 2004-06-15 18:09:00.000000000 +0300 @@ -194,20 +194,8 @@ #define SWAP_DWORD(dw) dw = ((dw & 0xff) << 24) | ((dw & 0xff00) << 8) | \ ((dw & 0xff0000) >> 8) | ((dw & 0xff000000) >> 24) -#ifdef FAST_LSB_WORD_ACCESS -#define READ_2BYTES(s) (*(uint16 *) (s)) -#define WRITE_2BYTES(s, d) *(uint16 *) (s) = (d) -#else -#ifdef LSB_FIRST -#define READ_2BYTES(s) (*(uint8 *) (s) | (*((uint8 *) (s) + 1) << 8)) -#define WRITE_2BYTES(s, d) *(uint8 *) (s) = (d), \ - *((uint8 *) (s) + 1) = (d) >> 8 -#else // else MSB_FISRT -#define READ_2BYTES(s) (*(uint8 *) (s) | (*((uint8 *) (s) + 1) << 8)) -#define WRITE_2BYTES(s, d) *(uint8 *) (s) = (d), \ - *((uint8 *) (s) + 1) = (d) >> 8 -#endif // LSB_FIRST -#endif // i386 +#define READ_2BYTES(s) ReadU16((s)) +#define WRITE_2BYTES(s, d) WriteU16((s), (d)) #define SUB_SCREEN_DEPTH 0 #define MAIN_SCREEN_DEPTH 32 diff -NaHudr snes9x/snes9x/globals.cpp snes9x2/snes9x/globals.cpp --- snes9x/snes9x/globals.cpp 2004-03-28 02:01:10.000000000 +0200 +++ snes9x2/snes9x/globals.cpp 2004-06-15 15:06:01.000000000 +0300 @@ -127,22 +127,10 @@ uint8 *RegRAM = NULL; uint8 *C4RAM = NULL; -long OpAddress = 0; - CMemory Memory; struct SSNESGameFixes SNESGameFixes; -uint8 A1 = 0, A2 = 0, A3 = 0, A4 = 0, W1 = 0, W2 = 0, W3 = 0, W4 = 0; -uint8 Ans8 = 0; -uint16 Ans16 = 0; -uint32 Ans32 = 0; -uint8 Work8 = 0; -uint16 Work16 = 0; -uint32 Work32 = 0; -signed char Int8 = 0; -short Int16 = 0; -long Int32 = 0; unsigned char OpenBus = 0; diff -NaHudr snes9x/snes9x/memmap.cpp snes9x2/snes9x/memmap.cpp --- snes9x/snes9x/memmap.cpp 2004-06-02 19:09:44.000000000 +0300 +++ snes9x2/snes9x/memmap.cpp 2004-06-15 18:19:41.000000000 +0300 @@ -728,11 +728,7 @@ #ifdef DETECT_NASTY_FX_INTERLEAVE //MK: Damn. YI trips a BRK currently. Maybe even on a real cart. -#ifdef LSB_FIRST - if(strncmp((char *) &ROM [0x7fc0], "YOSHI'S ISLAND", 14) == 0&&(*(uint16*)&ROM[0x7FDE])==57611&&ROM[0x10002]==0xA9) -#else - if(strncmp((char *) &ROM [0x7fc0], "YOSHI'S ISLAND", 14) == 0&&(ROM[0x7FDE]+(ROM[0x7FDF]<<8))==57611&&ROM[0x10002]==0xA9) -#endif + if(strncmp((char *) &ROM [0x7fc0], "YOSHI'S ISLAND", 14) == 0&&ReadU16(&ROM[0x7FDE])==57611&&ROM[0x10002]==0xA9) { Interleaved=true; Settings.ForceInterleaved2=true; diff -NaHudr snes9x/snes9x/memmap.h snes9x2/snes9x/memmap.h --- snes9x/snes9x/memmap.h 2004-05-08 13:35:37.000000000 +0300 +++ snes9x2/snes9x/memmap.h 2004-06-15 18:17:43.000000000 +0300 @@ -78,37 +78,13 @@ #include "snes9x.h" -#ifdef FAST_LSB_WORD_ACCESS -#define READ_WORD(s) (*(uint16 *) (s)) -#define READ_DWORD(s) (*(uint32 *) (s)) -#define WRITE_WORD(s, d) (*(uint16 *) (s)) = (d) -#define WRITE_DWORD(s, d) (*(uint32 *) (s)) = (d) - -#define READ_3WORD(s) (0x00ffffff & *(uint32 *) (s)) -#define WRITE_3WORD(s, d) *(uint16 *) (s) = (uint16)(d),\ - *((uint8 *) (s) + 2) = (uint8) ((d) >> 16) - +#define READ_WORD(s) ReadU16((s)) +#define READ_3WORD(s) ReadU24((s)) +#define READ_DWORD(s) ReadU32((s)) -#else -#define READ_WORD(s) ( *(uint8 *) (s) |\ - (*((uint8 *) (s) + 1) << 8)) -#define READ_DWORD(s) ( *(uint8 *) (s) |\ - (*((uint8 *) (s) + 1) << 8) |\ - (*((uint8 *) (s) + 2) << 16) |\ - (*((uint8 *) (s) + 3) << 24)) -#define WRITE_WORD(s, d) *(uint8 *) (s) = (d), \ - *((uint8 *) (s) + 1) = (d) >> 8 -#define WRITE_DWORD(s, d) *(uint8 *) (s) = (uint8) (d), \ - *((uint8 *) (s) + 1) = (uint8) ((d) >> 8),\ - *((uint8 *) (s) + 2) = (uint8) ((d) >> 16),\ - *((uint8 *) (s) + 3) = (uint8) ((d) >> 24) -#define WRITE_3WORD(s, d) *(uint8 *) (s) = (uint8) (d), \ - *((uint8 *) (s) + 1) = (uint8) ((d) >> 8),\ - *((uint8 *) (s) + 2) = (uint8) ((d) >> 16) -#define READ_3WORD(s) ( *(uint8 *) (s) |\ - (*((uint8 *) (s) + 1) << 8) |\ - (*((uint8 *) (s) + 2) << 16)) -#endif +#define WRITE_WORD(s, d) WriteU16((s), (d)) +#define WRITE_3WORD(s, d) WriteU24((s), (d)) +#define WRITE_DWORD(s, d) WriteU32((s), (d)) #define MEMMAP_BLOCK_SIZE (0x1000) #define MEMMAP_NUM_BLOCKS (0x1000000 / MEMMAP_BLOCK_SIZE) diff -NaHudr snes9x/snes9x/offsets.cpp snes9x2/snes9x/offsets.cpp --- snes9x/snes9x/offsets.cpp 2003-11-02 23:54:28.000000000 +0200 +++ snes9x2/snes9x/offsets.cpp 2004-06-15 14:19:43.000000000 +0300 @@ -183,8 +183,8 @@ OFFSET5(APURAM,RAM) OFFSET5(APUExecuting,APUExecuting) OFFSET5(APUDirectPage,DirectPage) - OFFSET5(APUBit,Bit) - OFFSET5(APUAddress,Address) + //OFFSET5(APUBit,Bit) + //OFFSET5(APUAddress,Address) OFFSET5(APUWaitAddress1,WaitAddress1) OFFSET5(APUWaitAddress2,WaitAddress2) OFFSET5(APUWaitCounter,WaitCounter) diff -NaHudr snes9x/snes9x/port.h snes9x2/snes9x/port.h --- snes9x/snes9x/port.h 2004-05-08 21:23:00.000000000 +0300 +++ snes9x2/snes9x/port.h 2004-06-16 00:54:01.000000000 +0300 @@ -278,4 +278,43 @@ #define STATIC static #endif +#ifdef FAST_LSB_WORD_ACCESS +static inline uint16 ReadU16(const void* pointer) { return *(uint16*)pointer; } +static inline uint32 ReadU32(const void* pointer) { return *(uint32*)pointer; } +static inline uint32 ReadU24(const void* pointer) { return ReadU32(pointer) & 0xFFFFFF; } +static inline void WriteU16(void* pointer, uint16 value) { *(uint16*)pointer = value; } +static inline void WriteU32(void* pointer, uint32 value) { *(uint32*)pointer = value; } +#else +static inline uint16 ReadU16(const void* pointer) +{ + const uint8*tmp = (const uint8*)pointer; + return tmp[0] | (tmp[1] << 8); +} +static inline uint32 ReadU24(const void* pointer) +{ + return ReadU16(pointer) | (((uint32)(const uint8*)pointer)[2] << 16); +} +static inline uint32 ReadU32(const void* pointer) +{ + return ReadU16(pointer) | ((uint32)ReadU16(2+(const uint8*)pointer) << 16); +} +static inline void WriteU16(void* pointer, uint16 value) +{ + uint8* tmp = (uint8*) pointeR; + tmp[0] = value&0xFF; + tmp[1] = value>>8; +} +static inline void WriteU32(void* pointer, uint32 value) +{ + uint8* tmp = (uint8*) pointer; + WriteU16(tmp, value&0xFFFF); + WriteU16(tmp+2, value>>16); +} +#endif +static inline void WriteU24(void* pointer, uint32 value) +{ + uint8* tmp = (uint8*) pointer; + WriteU16(tmp, value&0xFFFF); + tmp[2] = value>>16; +} #endif diff -NaHudr snes9x/snes9x/seta018.cpp snes9x2/snes9x/seta018.cpp --- snes9x/snes9x/seta018.cpp 2003-12-17 22:38:40.000000000 +0200 +++ snes9x2/snes9x/seta018.cpp 2004-06-15 13:58:49.000000000 +0300 @@ -104,6 +104,10 @@ // status register else if (address == 0x3800) t = ST018.status; + else + { + t = 0; /* FIXME: what should happen here? */ + } printf( "ST018 R: %06X %02X\n", Address, t); diff -NaHudr snes9x/snes9x/spc700.cpp snes9x2/snes9x/spc700.cpp --- snes9x/snes9x/spc700.cpp 2003-09-27 03:33:29.000000000 +0300 +++ snes9x2/snes9x/spc700.cpp 2004-06-18 14:40:58.475929784 +0300 @@ -93,21 +93,10 @@ #include "apumem.h" #endif -START_EXTERN_C -extern uint8 Work8; -extern uint16 Work16; -extern uint32 Work32; -extern signed char Int8; -extern short Int16; -extern long Int32; -extern short Int16; -extern uint8 W1; -extern uint8 W2; - -END_EXTERN_C +#define OP1 IAPU.PC[1] +#define OP2 IAPU.PC[2] -#define OP1 (*(IAPU.PC + 1)) -#define OP2 (*(IAPU.PC + 2)) +#define OP1w ReadU16(IAPU.PC+1) #ifdef SPC700_SHUTDOWN #define APUShutdown() \ @@ -130,11 +119,9 @@ #define APUShutdown() #endif -#define APUSetZN8(b)\ - IAPU._Zero = (b); +#define APUSetZN8(b) IAPU._Zero = (b); -#define APUSetZN16(w)\ - IAPU._Zero = ((w) != 0) | ((w) >> 8); +#define APUSetZN16(w) IAPU._Zero = ((w) != 0) | ((w) >> 8); void STOP (char *s) { @@ -156,192 +143,205 @@ #endif } -#define TCALL(n)\ -{\ - PushW (IAPU.PC - IAPU.RAM + 1); \ - IAPU.PC = IAPU.RAM + (APU.ExtraRAM [((15 - n) << 1)] + \ - (APU.ExtraRAM [((15 - n) << 1) + 1] << 8)); \ -} - // XXX: HalfCarry - BJ fixed? -#define SBC(a,b)\ -Int16 = (short) (a) - (short) (b) + (short) (APUCheckCarry ()) - 1;\ -IAPU._Carry = Int16 >= 0;\ -if ((((a) ^ (b)) & 0x80) && (((a) ^ (uint8) Int16) & 0x80))\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUSetHalfCarry ();\ -if(((a) ^ (b) ^ (uint8) Int16) & 0x10)\ - APUClearHalfCarry ();\ -(a) = (uint8) Int16;\ -APUSetZN8 ((uint8) Int16); +static inline void SBC(uint8& value, uint8 b) +{ + uint8 tmp = value; + int16 Int16 = (short) (tmp) - (short) (b) + (short) (APUCheckCarry ()) - 1; + IAPU._Carry = Int16 >= 0; + if (((tmp ^ (b)) & 0x80) && ((tmp ^ (uint8) Int16) & 0x80)) + APUSetOverflow (); + else + APUClearOverflow (); + APUSetHalfCarry (); + if((tmp ^ (b) ^ (uint8) Int16) & 0x10) + APUClearHalfCarry (); + tmp = (uint8) Int16; + APUSetZN8 (tmp); + value = tmp; +} // XXX: HalfCarry - BJ fixed? -#define ADC(a,b)\ -Work16 = (a) + (b) + APUCheckCarry();\ -IAPU._Carry = Work16 >= 0x100; \ -if (~((a) ^ (b)) & ((b) ^ (uint8) Work16) & 0x80)\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUClearHalfCarry ();\ -if(((a) ^ (b) ^ (uint8) Int16) & 0x10)\ - APUSetHalfCarry ();\ -(a) = (uint8) Work16;\ -APUSetZN8 ((uint8) Work16); - -#define CMP(a,b)\ -Int16 = (short) (a) - (short) (b);\ -IAPU._Carry = Int16 >= 0;\ -APUSetZN8 ((uint8) Int16); - -#define ASL(b)\ - IAPU._Carry = ((b) & 0x80) != 0; \ - (b) <<= 1;\ - APUSetZN8 (b); -#define LSR(b)\ - IAPU._Carry = (b) & 1;\ - (b) >>= 1;\ - APUSetZN8 (b); -#define ROL(b)\ - Work16 = ((b) << 1) | APUCheckCarry (); \ - IAPU._Carry = Work16 >= 0x100; \ - (b) = (uint8) Work16; \ - APUSetZN8 (b); -#define ROR(b)\ - Work16 = (b) | ((uint16) APUCheckCarry () << 8); \ - IAPU._Carry = (uint8) Work16 & 1; \ - Work16 >>= 1; \ - (b) = (uint8) Work16; \ - APUSetZN8 (b); - -#define Push(b)\ - *(IAPU.RAM + 0x100 + APURegisters.S) = b;\ - APURegisters.S--; +static inline void ADC(uint8& value, uint8 b) +{ + uint8 tmp = value; + uint16 Work16 = tmp + (b) + APUCheckCarry(); + IAPU._Carry = Work16 >= 0x100; + if (~(tmp ^ (b)) & ((b) ^ (uint8) Work16) & 0x80) + APUSetOverflow (); + else + APUClearOverflow (); + APUClearHalfCarry (); + if((tmp ^ (b) ^ (uint8) Work16 /* was Int16 */) & 0x10) + APUSetHalfCarry (); + tmp = (uint8) Work16; + APUSetZN8 (tmp); + value = tmp; +} -#define Pop(b)\ - APURegisters.S++;\ - (b) = *(IAPU.RAM + 0x100 + APURegisters.S); +static inline void CMP(uint8 a, uint8 b) +{ + int16 Int16 = (short) (a) - (short) (b); + IAPU._Carry = Int16 >= 0; + APUSetZN8 ((uint8) Int16); +} -#ifdef FAST_LSB_WORD_ACCESS -#define PushW(w)\ - *(uint16 *) (IAPU.RAM + 0xff + APURegisters.S) = w;\ - APURegisters.S -= 2; -#define PopW(w)\ - APURegisters.S += 2;\ - w = *(uint16 *) (IAPU.RAM + 0xff + APURegisters.S); -#else -#define PushW(w)\ - *(IAPU.RAM + 0xff + APURegisters.S) = w;\ - *(IAPU.RAM + 0x100 + APURegisters.S) = (w >> 8);\ - APURegisters.S -= 2; -#define PopW(w)\ - APURegisters.S += 2; \ - (w) = *(IAPU.RAM + 0xff + APURegisters.S) + (*(IAPU.RAM + 0x100 + APURegisters.S) << 8); -#endif +static inline void ASL(uint8& value) +{ + uint8 tmp = value; + IAPU._Carry = (tmp & 0x80) != 0; + tmp <<= 1; + APUSetZN8 (tmp); + value = tmp; +} -#define Relative()\ - Int8 = OP1;\ - Int16 = (int) (IAPU.PC + 2 - IAPU.RAM) + Int8; +static inline void LSR(uint8& value) +{ + uint8 tmp = value; + IAPU._Carry = tmp & 1; + tmp >>= 1; + APUSetZN8 (tmp); + value = tmp; +} -#define Relative2()\ - Int8 = OP2;\ - Int16 = (int) (IAPU.PC + 3 - IAPU.RAM) + Int8; +static inline void ROL(uint8& value) +{ + uint8 tmp = value; + uint16 Work16 = (tmp << 1) | APUCheckCarry (); + IAPU._Carry = Work16 >= 0x100; + tmp = (uint8) Work16; + APUSetZN8 (tmp); + value = tmp; +} -#ifdef FAST_LSB_WORD_ACCESS -#define IndexedXIndirect()\ - IAPU.Address = *(uint16 *) (IAPU.DirectPage + ((OP1 + APURegisters.X) & 0xff)); +static inline void ROR(uint8& value) +{ + uint8 tmp = value; + uint16 Work16 = tmp | ((uint16) APUCheckCarry () << 8); + IAPU._Carry = (uint8) Work16 & 1; + Work16 >>= 1; + tmp = (uint8) Work16; + APUSetZN8 (tmp); + value = tmp; +} -#define Absolute()\ - IAPU.Address = *(uint16 *) (IAPU.PC + 1); +static inline void Push(uint8 value) +{ + IAPU.RAM[0x100 + APURegisters.S--] = value; +} +static inline void Pop(uint8& value) +{ + value = IAPU.RAM[0x100 + (++APURegisters.S)]; +} -#define AbsoluteX()\ - IAPU.Address = *(uint16 *) (IAPU.PC + 1) + APURegisters.X; -#define AbsoluteY()\ - IAPU.Address = *(uint16 *) (IAPU.PC + 1) + APURegisters.YA.B.Y; +static inline void PushW(uint16 value) +{ + WriteU16(IAPU.RAM + 0xFF + APURegisters.S, value); + APURegisters.S -= 2; +} +static inline void PopW(uint16& value) +{ + APURegisters.S += 2; + value = ReadU16(IAPU.RAM + 0xFF + APURegisters.S); +} -#define MemBit()\ - IAPU.Address = *(uint16 *) (IAPU.PC + 1);\ - IAPU.Bit = (uint8)(IAPU.Address >> 13);\ - IAPU.Address &= 0x1fff; +static inline int16 Relative() +{ + return (short)((int)(IAPU.PC-IAPU.RAM) + 2 + (signed char)(OP1)); +} +static inline int16 Relative2() +{ + return (short)((int)(IAPU.PC-IAPU.RAM) + 3 + (signed char)(OP2)); +} -#define IndirectIndexedY()\ - IAPU.Address = *(uint16 *) (IAPU.DirectPage + OP1) + APURegisters.YA.B.Y; -#else -#define IndexedXIndirect()\ - IAPU.Address = *(IAPU.DirectPage + ((OP1 + APURegisters.X) & 0xff)) + \ - (*(IAPU.DirectPage + ((OP1 + APURegisters.X + 1) & 0xff)) << 8); -#define Absolute()\ - IAPU.Address = OP1 + (OP2 << 8); +static inline uint16 Absolute() +{ + return OP1w; +} -#define AbsoluteX()\ - IAPU.Address = OP1 + (OP2 << 8) + APURegisters.X; +static inline uint16 AbsoluteX() +{ + return OP1w + APURegisters.X; +} -#define AbsoluteY()\ - IAPU.Address = OP1 + (OP2 << 8) + APURegisters.YA.B.Y; +static inline uint16 AbsoluteY() +{ + return OP1w + APURegisters.YA.B.Y; +} -#define MemBit()\ - IAPU.Address = OP1 + (OP2 << 8);\ - IAPU.Bit = (int8) (IAPU.Address >> 13);\ - IAPU.Address &= 0x1fff; +static inline void MemBit(uint16& addr, uint8& bit) +{ + uint16 tmp = OP1w; + bit = (uint8)(tmp >> 13); + addr = tmp & 0x1FFF; +} -#define IndirectIndexedY()\ - IAPU.Address = *(IAPU.DirectPage + OP1) + \ - (*(IAPU.DirectPage + OP1 + 1) << 8) + \ - APURegisters.YA.B.Y; -#endif +static inline uint16 IndexedXIndirect() +{ + return ReadU16(IAPU.DirectPage + ((OP1 + APURegisters.X) & 0xFF)); +} +static inline uint16 IndirectIndexedY() +{ + return ReadU16(IAPU.DirectPage + OP1) + APURegisters.YA.B.Y; +} -void Apu00 () +static void Apu00 () { // NOP IAPU.PC++; } -void Apu01 () { TCALL (0) } +#define TCALL(n)\ +{\ + PushW (IAPU.PC - IAPU.RAM + 1); \ + IAPU.PC = IAPU.RAM + (APU.ExtraRAM [((15 - n) << 1)] + \ + (APU.ExtraRAM [((15 - n) << 1) + 1] << 8)); \ +} -void Apu11 () { TCALL (1) } +static void Apu01 () { TCALL (0) } -void Apu21 () { TCALL (2) } +static void Apu11 () { TCALL (1) } -void Apu31 () { TCALL (3) } +static void Apu21 () { TCALL (2) } -void Apu41 () { TCALL (4) } +static void Apu31 () { TCALL (3) } -void Apu51 () { TCALL (5) } +static void Apu41 () { TCALL (4) } -void Apu61 () { TCALL (6) } +static void Apu51 () { TCALL (5) } -void Apu71 () { TCALL (7) } +static void Apu61 () { TCALL (6) } -void Apu81 () { TCALL (8) } +static void Apu71 () { TCALL (7) } -void Apu91 () { TCALL (9) } +static void Apu81 () { TCALL (8) } -void ApuA1 () { TCALL (10) } +static void Apu91 () { TCALL (9) } -void ApuB1 () { TCALL (11) } +static void ApuA1 () { TCALL (10) } -void ApuC1 () { TCALL (12) } +static void ApuB1 () { TCALL (11) } -void ApuD1 () { TCALL (13) } +static void ApuC1 () { TCALL (12) } -void ApuE1 () { TCALL (14) } +static void ApuD1 () { TCALL (13) } -void ApuF1 () { TCALL (15) } +static void ApuE1 () { TCALL (14) } -void Apu3F () // CALL absolute +static void ApuF1 () { TCALL (15) } + +static void Apu3F () // CALL absolute { - Absolute (); + uint16 addr = Absolute (); // 0xB6f for Star Fox 2 PushW (IAPU.PC + 3 - IAPU.RAM); - IAPU.PC = IAPU.RAM + IAPU.Address; + IAPU.PC = IAPU.RAM + addr; } -void Apu4F () // PCALL $XX +static void Apu4F () // PCALL $XX { - Work8 = OP1; + uint8 Work8 = OP1; PushW (IAPU.PC + 2 - IAPU.RAM); IAPU.PC = IAPU.RAM + 0xff00 + Work8; } @@ -350,42 +350,42 @@ S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1 ) | (1 << (b))), OP1); \ IAPU.PC += 2 -void Apu02 () +static void Apu02 () { SET (0); } -void Apu22 () +static void Apu22 () { SET (1); } -void Apu42 () +static void Apu42 () { SET (2); } -void Apu62 () +static void Apu62 () { SET (3); } -void Apu82 () +static void Apu82 () { SET (4); } -void ApuA2 () +static void ApuA2 () { SET (5); } -void ApuC2 () +static void ApuC2 () { SET (6); } -void ApuE2 () +static void ApuE2 () { SET (7); } @@ -394,49 +394,49 @@ S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1) & ~(1 << (b))), OP1); \ IAPU.PC += 2; -void Apu12 () +static void Apu12 () { CLR (0); } -void Apu32 () +static void Apu32 () { CLR (1); } -void Apu52 () +static void Apu52 () { CLR (2); } -void Apu72 () +static void Apu72 () { CLR (3); } -void Apu92 () +static void Apu92 () { CLR (4); } -void ApuB2 () +static void ApuB2 () { CLR (5); } -void ApuD2 () +static void ApuD2 () { CLR (6); } -void ApuF2 () +static void ApuF2 () { CLR (7); } #define BBS(b) \ -Work8 = OP1; \ -Relative2 (); \ +uint8 Work8 = OP1; \ +int16 Int16 = Relative2 (); \ if (S9xAPUGetByteZ (Work8) & (1 << (b))) \ { \ IAPU.PC = IAPU.RAM + (uint16) Int16; \ @@ -445,49 +445,49 @@ else \ IAPU.PC += 3 -void Apu03 () +static void Apu03 () { BBS (0); } -void Apu23 () +static void Apu23 () { BBS (1); } -void Apu43 () +static void Apu43 () { BBS (2); } -void Apu63 () +static void Apu63 () { BBS (3); } -void Apu83 () +static void Apu83 () { BBS (4); } -void ApuA3 () +static void ApuA3 () { BBS (5); } -void ApuC3 () +static void ApuC3 () { BBS (6); } -void ApuE3 () +static void ApuE3 () { BBS (7); } #define BBC(b) \ -Work8 = OP1; \ -Relative2 (); \ +uint8 Work8 = OP1; \ +int16 Int16 = Relative2 (); \ if (!(S9xAPUGetByteZ (Work8) & (1 << (b)))) \ { \ IAPU.PC = IAPU.RAM + (uint16) Int16; \ @@ -496,47 +496,47 @@ else \ IAPU.PC += 3 -void Apu13 () +static void Apu13 () { BBC (0); } -void Apu33 () +static void Apu33 () { BBC (1); } -void Apu53 () +static void Apu53 () { BBC (2); } -void Apu73 () +static void Apu73 () { BBC (3); } -void Apu93 () +static void Apu93 () { BBC (4); } -void ApuB3 () +static void ApuB3 () { BBC (5); } -void ApuD3 () +static void ApuD3 () { BBC (6); } -void ApuF3 () +static void ApuF3 () { BBC (7); } -void Apu04 () +static void Apu04 () { // OR A,dp APURegisters.YA.B.A |= S9xAPUGetByteZ (OP1); @@ -544,16 +544,16 @@ IAPU.PC += 2; } -void Apu05 () +static void Apu05 () { // OR A,abs - Absolute (); - APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.YA.B.A |= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu06 () +static void Apu06 () { // OR A,(X) APURegisters.YA.B.A |= S9xAPUGetByteZ (APURegisters.X); @@ -561,16 +561,16 @@ IAPU.PC++; } -void Apu07 () +static void Apu07 () { // OR A,(dp+X) - IndexedXIndirect (); - APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + APURegisters.YA.B.A |= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu08 () +static void Apu08 () { // OR A,#00 APURegisters.YA.B.A |= OP1; @@ -578,17 +578,17 @@ IAPU.PC += 2; } -void Apu09 () +static void Apu09 () { // OR dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); Work8 |= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu14 () +static void Apu14 () { // OR A,dp+X APURegisters.YA.B.A |= S9xAPUGetByteZ (OP1 + APURegisters.X); @@ -596,187 +596,195 @@ IAPU.PC += 2; } -void Apu15 () +static void Apu15 () { // OR A,abs+X - AbsoluteX (); - APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + APURegisters.YA.B.A |= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu16 () +static void Apu16 () { // OR A,abs+Y - AbsoluteY (); - APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + APURegisters.YA.B.A |= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu17 () +static void Apu17 () { // OR A,(dp)+Y - IndirectIndexedY (); - APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + APURegisters.YA.B.A |= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu18 () +static void Apu18 () { // OR dp,#00 - Work8 = OP1; + uint8 Work8 = OP1; Work8 |= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu19 () +static void Apu19 () { // OR (X),(Y) - Work8 = S9xAPUGetByteZ (APURegisters.X) | S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) | S9xAPUGetByteZ (APURegisters.YA.B.Y); APUSetZN8 (Work8); S9xAPUSetByteZ (Work8, APURegisters.X); IAPU.PC++; } -void Apu0A () +static void Apu0A () { // OR1 C,membit - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (!APUCheckCarry ()) { - if (S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit)) + if (S9xAPUGetByte (addr) & (1 << Bit)) APUSetCarry (); } IAPU.PC += 3; } -void Apu2A () +static void Apu2A () { // OR1 C,not membit - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (!APUCheckCarry ()) { - if (!(S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit))) + if (!(S9xAPUGetByte (addr) & (1 << Bit))) APUSetCarry (); } IAPU.PC += 3; } -void Apu4A () +static void Apu4A () { // AND1 C,membit - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (APUCheckCarry ()) { - if (!(S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit))) + if (!(S9xAPUGetByte (addr) & (1 << Bit))) APUClearCarry (); } IAPU.PC += 3; } -void Apu6A () +static void Apu6A () { // AND1 C, not membit - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (APUCheckCarry ()) { - if ((S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit))) + if ((S9xAPUGetByte (addr) & (1 << Bit))) APUClearCarry (); } IAPU.PC += 3; } -void Apu8A () +static void Apu8A () { // EOR1 C, membit - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (APUCheckCarry ()) { - if (S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit)) + if (S9xAPUGetByte (addr) & (1 << Bit)) APUClearCarry (); } else { - if (S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit)) + if (S9xAPUGetByte (addr) & (1 << Bit)) APUSetCarry (); } IAPU.PC += 3; } -void ApuAA () +static void ApuAA () { // MOV1 C,membit - MemBit (); - if (S9xAPUGetByte (IAPU.Address) & (1 << IAPU.Bit)) + uint16 addr; uint8 Bit; + MemBit (addr, Bit); + if (S9xAPUGetByte (addr) & (1 << Bit)) APUSetCarry (); else APUClearCarry (); IAPU.PC += 3; } -void ApuCA () +static void ApuCA () { // MOV1 membit,C - MemBit (); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); if (APUCheckCarry ()) { - S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) | (1 << IAPU.Bit), IAPU.Address); + S9xAPUSetByte (S9xAPUGetByte (addr) | (1 << Bit), addr); } else { - S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) & ~(1 << IAPU.Bit), IAPU.Address); + S9xAPUSetByte (S9xAPUGetByte (addr) & ~(1 << Bit), addr); } IAPU.PC += 3; } -void ApuEA () +static void ApuEA () { // NOT1 membit - MemBit (); - S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) ^ (1 << IAPU.Bit), IAPU.Address); + uint16 addr; uint8 Bit; + MemBit (addr, Bit); + S9xAPUSetByte (S9xAPUGetByte (addr) ^ (1 << Bit), addr); IAPU.PC += 3; } -void Apu0B () +static void Apu0B () { // ASL dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); ASL (Work8); S9xAPUSetByteZ (Work8, OP1); IAPU.PC += 2; } -void Apu0C () +static void Apu0C () { // ASL abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); ASL (Work8); - S9xAPUSetByte (Work8, IAPU.Address); + S9xAPUSetByte (Work8, addr); IAPU.PC += 3; } -void Apu1B () +static void Apu1B () { // ASL dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); ASL (Work8); S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); IAPU.PC += 2; } -void Apu1C () +static void Apu1C () { // ASL A ASL (APURegisters.YA.B.A); IAPU.PC++; } -void Apu0D () +static void Apu0D () { // PUSH PSW S9xAPUPackStatus (); @@ -784,28 +792,28 @@ IAPU.PC++; } -void Apu2D () +static void Apu2D () { // PUSH A Push (APURegisters.YA.B.A); IAPU.PC++; } -void Apu4D () +static void Apu4D () { // PUSH X Push (APURegisters.X); IAPU.PC++; } -void Apu6D () +static void Apu6D () { // PUSH Y Push (APURegisters.YA.B.Y); IAPU.PC++; } -void Apu8E () +static void Apu8E () { // POP PSW Pop (APURegisters.P); @@ -817,50 +825,50 @@ IAPU.PC++; } -void ApuAE () +static void ApuAE () { // POP A Pop (APURegisters.YA.B.A); IAPU.PC++; } -void ApuCE () +static void ApuCE () { // POP X Pop (APURegisters.X); IAPU.PC++; } -void ApuEE () +static void ApuEE () { // POP Y Pop (APURegisters.YA.B.Y); IAPU.PC++; } -void Apu0E () +static void Apu0E () { // TSET1 abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); - S9xAPUSetByte (Work8 | APURegisters.YA.B.A, IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); + S9xAPUSetByte (Work8 | APURegisters.YA.B.A, addr); Work8 &= APURegisters.YA.B.A; APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu4E () +static void Apu4E () { // TCLR1 abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); - S9xAPUSetByte (Work8 & ~APURegisters.YA.B.A, IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); + S9xAPUSetByte (Work8 & ~APURegisters.YA.B.A, addr); Work8 &= APURegisters.YA.B.A; APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu0F () +static void Apu0F () { // BRK @@ -877,7 +885,7 @@ #endif } -void ApuEF () +static void ApuEF () { // SLEEP // XXX: sleep @@ -886,7 +894,7 @@ IAPU.PC++; } -void ApuFF () +static void ApuFF () { // STOP // STOP ("STOP"); @@ -894,10 +902,10 @@ IAPU.PC++; } -void Apu10 () +static void Apu10 () { // BPL - Relative (); + int16 Int16 = Relative(); if (!APUCheckNegative ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -908,10 +916,10 @@ IAPU.PC += 2; } -void Apu30 () +static void Apu30 () { // BMI - Relative (); + int16 Int16 = Relative(); if (APUCheckNegative ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -922,10 +930,10 @@ IAPU.PC += 2; } -void Apu90 () +static void Apu90 () { // BCC - Relative (); + int16 Int16 = Relative(); if (!APUCheckCarry ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -936,10 +944,10 @@ IAPU.PC += 2; } -void ApuB0 () +static void ApuB0 () { // BCS - Relative (); + int16 Int16 = Relative(); if (APUCheckCarry ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -950,10 +958,10 @@ IAPU.PC += 2; } -void ApuD0 () +static void ApuD0 () { // BNE - Relative (); + int16 Int16 = Relative(); if (!APUCheckZero ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -964,10 +972,10 @@ IAPU.PC += 2; } -void ApuF0 () +static void ApuF0 () { // BEQ - Relative (); + int16 Int16 = Relative(); if (APUCheckZero ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -978,10 +986,10 @@ IAPU.PC += 2; } -void Apu50 () +static void Apu50 () { // BVC - Relative (); + int16 Int16 = Relative(); if (!APUCheckOverflow ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -991,10 +999,10 @@ IAPU.PC += 2; } -void Apu70 () +static void Apu70 () { // BVS - Relative (); + int16 Int16 = Relative(); if (APUCheckOverflow ()) { IAPU.PC = IAPU.RAM + (uint16) Int16; @@ -1004,28 +1012,28 @@ IAPU.PC += 2; } -void Apu2F () +static void Apu2F () { // BRA - Relative (); + int16 Int16 = Relative(); IAPU.PC = IAPU.RAM + (uint16) Int16; } -void Apu80 () +static void Apu80 () { // SETC APUSetCarry (); IAPU.PC++; } -void ApuED () +static void ApuED () { // NOTC IAPU._Carry ^= 1; IAPU.PC++; } -void Apu40 () +static void Apu40 () { // SETP APUSetDirectPage (); @@ -1033,10 +1041,10 @@ IAPU.PC++; } -void Apu1A () +static void Apu1A () { // DECW dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); Work16--; S9xAPUSetByteZ ((uint8) Work16, OP1); S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); @@ -1044,20 +1052,20 @@ IAPU.PC += 2; } -void Apu5A () +static void Apu5A () { // CMPW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Int32 = (long) APURegisters.YA.W - (long) Work16; + uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + int32 Int32 = (long) APURegisters.YA.W - (long) Work16; IAPU._Carry = Int32 >= 0; APUSetZN16 ((uint16) Int32); IAPU.PC += 2; } -void Apu3A () +static void Apu3A () { // INCW dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); Work16++; S9xAPUSetByteZ ((uint8) Work16, OP1); S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); @@ -1066,11 +1074,11 @@ } // XXX: HalfCarry - BJ Fixed? Or is it between bits 7 and 8 for ADDW/SUBW? -void Apu7A () +static void Apu7A () { // ADDW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Work32 = (uint32) APURegisters.YA.W + Work16; + uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + uint32 Work32 = (uint32) APURegisters.YA.W + Work16; IAPU._Carry = Work32 >= 0x10000; if (~(APURegisters.YA.W ^ Work16) & (Work16 ^ (uint16) Work32) & 0x8000) APUSetOverflow (); @@ -1086,11 +1094,11 @@ // XXX: BJ: i think the old HalfCarry behavior was wrong... // XXX: Or is it between bits 7 and 8 for ADDW/SUBW? -void Apu9A () +static void Apu9A () { // SUBW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Int32 = (long) APURegisters.YA.W - (long) Work16; + uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + int32 Int32 = (long) APURegisters.YA.W - (long) Work16; APUClearHalfCarry (); IAPU._Carry = Int32 >= 0; if (((APURegisters.YA.W ^ Work16) & 0x8000) && @@ -1102,14 +1110,14 @@ ((APURegisters.YA.W ^ (uint16) Int32) & 0x0080)) APUSetHalfCarry (); APUSetHalfCarry (); - if((APURegisters.YA.W ^ Work16 ^ (uint16) Work32) & 0x10) + if((APURegisters.YA.W ^ Work16 ^ (uint16) Int32 /* Was Work32 */) & 0x10) APUClearHalfCarry (); APURegisters.YA.W = (uint16) Int32; APUSetZN16 (APURegisters.YA.W); IAPU.PC += 2; } -void ApuBA () +static void ApuBA () { // MOVW YA,dp APURegisters.YA.B.A = S9xAPUGetByteZ (OP1); @@ -1118,7 +1126,7 @@ IAPU.PC += 2; } -void ApuDA () +static void ApuDA () { // MOVW dp,YA S9xAPUSetByteZ (APURegisters.YA.B.A, OP1); @@ -1126,177 +1134,177 @@ IAPU.PC += 2; } -void Apu64 () +static void Apu64 () { // CMP A,dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu65 () +static void Apu65 () { // CMP A,abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu66 () +static void Apu66 () { // CMP A,(X) - Work8 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X); CMP (APURegisters.YA.B.A, Work8); IAPU.PC++; } -void Apu67 () +static void Apu67 () { // CMP A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu68 () +static void Apu68 () { // CMP A,#00 - Work8 = OP1; + uint8 Work8 = OP1; CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu69 () +static void Apu69 () { // CMP dp(dest), dp(src) - W1 = S9xAPUGetByteZ (OP1); - Work8 = S9xAPUGetByteZ (OP2); + uint8 W1 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP2); CMP (Work8, W1); IAPU.PC += 3; } -void Apu74 () +static void Apu74 () { // CMP A, dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu75 () +static void Apu75 () { // CMP A,abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu76 () +static void Apu76 () { // CMP A, abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu77 () +static void Apu77 () { // CMP A,(dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu78 () +static void Apu78 () { // CMP dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); + uint8 Work8 = OP1; + uint8 W1 = S9xAPUGetByteZ (OP2); CMP (W1, Work8); IAPU.PC += 3; } -void Apu79 () +static void Apu79 () { // CMP (X),(Y) - W1 = S9xAPUGetByteZ (APURegisters.X); - Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 W1 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); CMP (W1, Work8); IAPU.PC++; } -void Apu1E () +static void Apu1E () { // CMP X,abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.X, Work8); IAPU.PC += 3; } -void Apu3E () +static void Apu3E () { // CMP X,dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); CMP (APURegisters.X, Work8); IAPU.PC += 2; } -void ApuC8 () +static void ApuC8 () { // CMP X,#00 CMP (APURegisters.X, OP1); IAPU.PC += 2; } -void Apu5E () +static void Apu5E () { // CMP Y,abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); CMP (APURegisters.YA.B.Y, Work8); IAPU.PC += 3; } -void Apu7E () +static void Apu7E () { // CMP Y,dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); CMP (APURegisters.YA.B.Y, Work8); IAPU.PC += 2; } -void ApuAD () +static void ApuAD () { // CMP Y,#00 - Work8 = OP1; + uint8 Work8 = OP1; CMP (APURegisters.YA.B.Y, Work8); IAPU.PC += 2; } -void Apu1F () +static void Apu1F () { // JMP (abs+X) - Absolute (); - IAPU.PC = IAPU.RAM + S9xAPUGetByte (IAPU.Address + APURegisters.X) + - (S9xAPUGetByte (IAPU.Address + APURegisters.X + 1) << 8); + uint16 addr = Absolute(); + IAPU.PC = IAPU.RAM + S9xAPUGetByte (addr + APURegisters.X) + + (S9xAPUGetByte (addr + APURegisters.X + 1) << 8); // XXX: HERE: // APU.Flags |= TRACE_FLAG; } -void Apu5F () +static void Apu5F () { // JMP abs - Absolute (); - IAPU.PC = IAPU.RAM + IAPU.Address; + uint16 addr = Absolute(); + IAPU.PC = IAPU.RAM + addr; } -void Apu20 () +static void Apu20 () { // CLRP APUClearDirectPage (); @@ -1304,14 +1312,14 @@ IAPU.PC++; } -void Apu60 () +static void Apu60 () { // CLRC APUClearCarry (); IAPU.PC++; } -void ApuE0 () +static void ApuE0 () { // CLRV APUClearHalfCarry (); @@ -1319,7 +1327,7 @@ IAPU.PC++; } -void Apu24 () +static void Apu24 () { // AND A,dp APURegisters.YA.B.A &= S9xAPUGetByteZ (OP1); @@ -1327,16 +1335,16 @@ IAPU.PC += 2; } -void Apu25 () +static void Apu25 () { // AND A,abs - Absolute (); - APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.YA.B.A &= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu26 () +static void Apu26 () { // AND A,(X) APURegisters.YA.B.A &= S9xAPUGetByteZ (APURegisters.X); @@ -1344,16 +1352,16 @@ IAPU.PC++; } -void Apu27 () +static void Apu27 () { // AND A,(dp+X) - IndexedXIndirect (); - APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + APURegisters.YA.B.A &= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu28 () +static void Apu28 () { // AND A,#00 APURegisters.YA.B.A &= OP1; @@ -1361,17 +1369,17 @@ IAPU.PC += 2; } -void Apu29 () +static void Apu29 () { // AND dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); Work8 &= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu34 () +static void Apu34 () { // AND A,dp+X APURegisters.YA.B.A &= S9xAPUGetByteZ (OP1 + APURegisters.X); @@ -1379,92 +1387,92 @@ IAPU.PC += 2; } -void Apu35 () +static void Apu35 () { // AND A,abs+X - AbsoluteX (); - APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + APURegisters.YA.B.A &= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu36 () +static void Apu36 () { // AND A,abs+Y - AbsoluteY (); - APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + APURegisters.YA.B.A &= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu37 () +static void Apu37 () { // AND A,(dp)+Y - IndirectIndexedY (); - APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + APURegisters.YA.B.A &= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu38 () +static void Apu38 () { // AND dp,#00 - Work8 = OP1; + uint8 Work8 = OP1; Work8 &= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu39 () +static void Apu39 () { // AND (X),(Y) - Work8 = S9xAPUGetByteZ (APURegisters.X) & S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) & S9xAPUGetByteZ (APURegisters.YA.B.Y); APUSetZN8 (Work8); S9xAPUSetByteZ (Work8, APURegisters.X); IAPU.PC++; } -void Apu2B () +static void Apu2B () { // ROL dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); ROL (Work8); S9xAPUSetByteZ (Work8, OP1); IAPU.PC += 2; } -void Apu2C () +static void Apu2C () { // ROL abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); ROL (Work8); - S9xAPUSetByte (Work8, IAPU.Address); + S9xAPUSetByte (Work8, addr); IAPU.PC += 3; } -void Apu3B () +static void Apu3B () { // ROL dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); ROL (Work8); S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); IAPU.PC += 2; } -void Apu3C () +static void Apu3C () { // ROL A ROL (APURegisters.YA.B.A); IAPU.PC++; } -void Apu2E () +static void Apu2E () { // CBNE dp,rel - Work8 = OP1; - Relative2 (); + uint8 Work8 = OP1; + int16 Int16 = Relative2 (); if (S9xAPUGetByteZ (Work8) != APURegisters.YA.B.A) { @@ -1476,11 +1484,11 @@ IAPU.PC += 3; } -void ApuDE () +static void ApuDE () { // CBNE dp+X,rel - Work8 = OP1 + APURegisters.X; - Relative2 (); + uint8 Work8 = OP1 + APURegisters.X; + int16 Int16 = Relative2 (); if (S9xAPUGetByteZ (Work8) != APURegisters.YA.B.A) { @@ -1492,7 +1500,7 @@ IAPU.PC += 3; } -void Apu3D () +static void Apu3D () { // INC X APURegisters.X++; @@ -1505,7 +1513,7 @@ IAPU.PC++; } -void ApuFC () +static void ApuFC () { // INC Y APURegisters.YA.B.Y++; @@ -1518,7 +1526,7 @@ IAPU.PC++; } -void Apu1D () +static void Apu1D () { // DEC X APURegisters.X--; @@ -1531,7 +1539,7 @@ IAPU.PC++; } -void ApuDC () +static void ApuDC () { // DEC Y APURegisters.YA.B.Y--; @@ -1544,10 +1552,10 @@ IAPU.PC++; } -void ApuAB () +static void ApuAB () { // INC dp - Work8 = S9xAPUGetByteZ (OP1) + 1; + uint8 Work8 = S9xAPUGetByteZ (OP1) + 1; S9xAPUSetByteZ (Work8, OP1); APUSetZN8 (Work8); @@ -1558,12 +1566,12 @@ IAPU.PC += 2; } -void ApuAC () +static void ApuAC () { // INC abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address) + 1; - S9xAPUSetByte (Work8, IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr) + 1; + S9xAPUSetByte (Work8, addr); APUSetZN8 (Work8); #ifdef SPC700_SHUTDOWN @@ -1573,10 +1581,10 @@ IAPU.PC += 3; } -void ApuBB () +static void ApuBB () { // INC dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) + 1; + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) + 1; S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); APUSetZN8 (Work8); @@ -1587,7 +1595,7 @@ IAPU.PC += 2; } -void ApuBC () +static void ApuBC () { // INC A APURegisters.YA.B.A++; @@ -1600,10 +1608,10 @@ IAPU.PC++; } -void Apu8B () +static void Apu8B () { // DEC dp - Work8 = S9xAPUGetByteZ (OP1) - 1; + uint8 Work8 = S9xAPUGetByteZ (OP1) - 1; S9xAPUSetByteZ (Work8, OP1); APUSetZN8 (Work8); @@ -1614,12 +1622,12 @@ IAPU.PC += 2; } -void Apu8C () +static void Apu8C () { // DEC abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address) - 1; - S9xAPUSetByte (Work8, IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr) - 1; + S9xAPUSetByte (Work8, addr); APUSetZN8 (Work8); #ifdef SPC700_SHUTDOWN @@ -1629,10 +1637,10 @@ IAPU.PC += 3; } -void Apu9B () +static void Apu9B () { // DEC dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) - 1; + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) - 1; S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); APUSetZN8 (Work8); @@ -1643,7 +1651,7 @@ IAPU.PC += 2; } -void Apu9C () +static void Apu9C () { // DEC A APURegisters.YA.B.A--; @@ -1656,7 +1664,7 @@ IAPU.PC++; } -void Apu44 () +static void Apu44 () { // EOR A,dp APURegisters.YA.B.A ^= S9xAPUGetByteZ (OP1); @@ -1664,16 +1672,16 @@ IAPU.PC += 2; } -void Apu45 () +static void Apu45 () { // EOR A,abs - Absolute (); - APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.YA.B.A ^= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu46 () +static void Apu46 () { // EOR A,(X) APURegisters.YA.B.A ^= S9xAPUGetByteZ (APURegisters.X); @@ -1681,16 +1689,16 @@ IAPU.PC++; } -void Apu47 () +static void Apu47 () { // EOR A,(dp+X) - IndexedXIndirect (); - APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + APURegisters.YA.B.A ^= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu48 () +static void Apu48 () { // EOR A,#00 APURegisters.YA.B.A ^= OP1; @@ -1698,17 +1706,17 @@ IAPU.PC += 2; } -void Apu49 () +static void Apu49 () { // EOR dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); Work8 ^= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu54 () +static void Apu54 () { // EOR A,dp+X APURegisters.YA.B.A ^= S9xAPUGetByteZ (OP1 + APURegisters.X); @@ -1716,88 +1724,88 @@ IAPU.PC += 2; } -void Apu55 () +static void Apu55 () { // EOR A,abs+X - AbsoluteX (); - APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + APURegisters.YA.B.A ^= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu56 () +static void Apu56 () { // EOR A,abs+Y - AbsoluteY (); - APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + APURegisters.YA.B.A ^= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void Apu57 () +static void Apu57 () { // EOR A,(dp)+Y - IndirectIndexedY (); - APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + APURegisters.YA.B.A ^= S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void Apu58 () +static void Apu58 () { // EOR dp,#00 - Work8 = OP1; + uint8 Work8 = OP1; Work8 ^= S9xAPUGetByteZ (OP2); S9xAPUSetByteZ (Work8, OP2); APUSetZN8 (Work8); IAPU.PC += 3; } -void Apu59 () +static void Apu59 () { // EOR (X),(Y) - Work8 = S9xAPUGetByteZ (APURegisters.X) ^ S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) ^ S9xAPUGetByteZ (APURegisters.YA.B.Y); APUSetZN8 (Work8); S9xAPUSetByteZ (Work8, APURegisters.X); IAPU.PC++; } -void Apu4B () +static void Apu4B () { // LSR dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); LSR (Work8); S9xAPUSetByteZ (Work8, OP1); IAPU.PC += 2; } -void Apu4C () +static void Apu4C () { // LSR abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); LSR (Work8); - S9xAPUSetByte (Work8, IAPU.Address); + S9xAPUSetByte (Work8, addr); IAPU.PC += 3; } -void Apu5B () +static void Apu5B () { // LSR dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); LSR (Work8); S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); IAPU.PC += 2; } -void Apu5C () +static void Apu5C () { // LSR A LSR (APURegisters.YA.B.A); IAPU.PC++; } -void Apu7D () +static void Apu7D () { // MOV A,X APURegisters.YA.B.A = APURegisters.X; @@ -1805,7 +1813,7 @@ IAPU.PC++; } -void ApuDD () +static void ApuDD () { // MOV A,Y APURegisters.YA.B.A = APURegisters.YA.B.Y; @@ -1813,7 +1821,7 @@ IAPU.PC++; } -void Apu5D () +static void Apu5D () { // MOV X,A APURegisters.X = APURegisters.YA.B.A; @@ -1821,7 +1829,7 @@ IAPU.PC++; } -void ApuFD () +static void ApuFD () { // MOV Y,A APURegisters.YA.B.Y = APURegisters.YA.B.A; @@ -1829,7 +1837,7 @@ IAPU.PC++; } -void Apu9D () +static void Apu9D () { //MOV X,SP APURegisters.X = APURegisters.S; @@ -1837,54 +1845,54 @@ IAPU.PC++; } -void ApuBD () +static void ApuBD () { // MOV SP,X APURegisters.S = APURegisters.X; IAPU.PC++; } -void Apu6B () +static void Apu6B () { // ROR dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); ROR (Work8); S9xAPUSetByteZ (Work8, OP1); IAPU.PC += 2; } -void Apu6C () +static void Apu6C () { // ROR abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); ROR (Work8); - S9xAPUSetByte (Work8, IAPU.Address); + S9xAPUSetByte (Work8, addr); IAPU.PC += 3; } -void Apu7B () +static void Apu7B () { // ROR dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); ROR (Work8); S9xAPUSetByteZ (Work8, OP1 + APURegisters.X); IAPU.PC += 2; } -void Apu7C () +static void Apu7C () { // ROR A ROR (APURegisters.YA.B.A); IAPU.PC++; } -void Apu6E () +static void Apu6E () { // DBNZ dp,rel - Work8 = OP1; - Relative2 (); - W1 = S9xAPUGetByteZ (Work8) - 1; + uint8 Work8 = OP1; + int16 Int16 = Relative2 (); + uint8 W1 = S9xAPUGetByteZ (Work8) - 1; S9xAPUSetByteZ (W1, Work8); if (W1 != 0) { @@ -1895,10 +1903,10 @@ IAPU.PC += 3; } -void ApuFE () +static void ApuFE () { // DBNZ Y,rel - Relative (); + int16 Int16 = Relative (); APURegisters.YA.B.Y--; if (APURegisters.YA.B.Y != 0) { @@ -1909,14 +1917,14 @@ IAPU.PC += 2; } -void Apu6F () +static void Apu6F () { // RET PopW (APURegisters.PC); IAPU.PC = IAPU.RAM + APURegisters.PC; } -void Apu7F () +static void Apu7F () { // RETI // STOP ("RETI"); @@ -1926,114 +1934,114 @@ IAPU.PC = IAPU.RAM + APURegisters.PC; } -void Apu84 () +static void Apu84 () { // ADC A,dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu85 () +static void Apu85 () { // ADC A, abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu86 () +static void Apu86 () { // ADC A,(X) - Work8 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X); ADC (APURegisters.YA.B.A, Work8); IAPU.PC++; } -void Apu87 () +static void Apu87 () { // ADC A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + uint8 Work8 = S9xAPUGetByte (addr); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu88 () +static void Apu88 () { // ADC A,#00 - Work8 = OP1; + uint8 Work8 = OP1; ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu89 () +static void Apu89 () { // ADC dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); - W1 = S9xAPUGetByteZ (OP2); + uint8 Work8 = S9xAPUGetByteZ (OP1); + uint8 W1 = S9xAPUGetByteZ (OP2); ADC (W1, Work8); S9xAPUSetByteZ (W1, OP2); IAPU.PC += 3; } -void Apu94 () +static void Apu94 () { // ADC A,dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu95 () +static void Apu95 () { // ADC A, abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + uint8 Work8 = S9xAPUGetByte (addr); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu96 () +static void Apu96 () { // ADC A, abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + uint8 Work8 = S9xAPUGetByte (addr); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void Apu97 () +static void Apu97 () { // ADC A, (dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + uint8 Work8 = S9xAPUGetByte (addr); ADC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void Apu98 () +static void Apu98 () { // ADC dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); + uint8 Work8 = OP1; + uint8 W1 = S9xAPUGetByteZ (OP2); ADC (W1, Work8); S9xAPUSetByteZ (W1, OP2); IAPU.PC += 3; } -void Apu99 () +static void Apu99 () { // ADC (X),(Y) - W1 = S9xAPUGetByteZ (APURegisters.X); - Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 W1 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); ADC (W1, Work8); S9xAPUSetByteZ (W1, APURegisters.X); IAPU.PC++; } -void Apu8D () +static void Apu8D () { // MOV Y,#00 APURegisters.YA.B.Y = OP1; @@ -2041,15 +2049,15 @@ IAPU.PC += 2; } -void Apu8F () +static void Apu8F () { // MOV dp,#00 - Work8 = OP1; + uint8 Work8 = OP1; S9xAPUSetByteZ (Work8, OP2); IAPU.PC += 3; } -void Apu9E () +static void Apu9E () { // DIV YA,X if (APURegisters.X == 0) @@ -2061,7 +2069,7 @@ else { APUClearOverflow (); - Work8 = APURegisters.YA.W / APURegisters.X; + uint8 Work8 = APURegisters.YA.W / APURegisters.X; APURegisters.YA.B.Y = APURegisters.YA.W % APURegisters.X; APURegisters.YA.B.A = Work8; } @@ -2071,7 +2079,7 @@ IAPU.PC++; } -void Apu9F () +static void Apu9F () { // XCN A APURegisters.YA.B.A = (APURegisters.YA.B.A >> 4) | (APURegisters.YA.B.A << 4); @@ -2079,121 +2087,121 @@ IAPU.PC++; } -void ApuA4 () +static void ApuA4 () { // SBC A, dp - Work8 = S9xAPUGetByteZ (OP1); + uint8 Work8 = S9xAPUGetByteZ (OP1); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void ApuA5 () +static void ApuA5 () { // SBC A, abs - Absolute (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + uint8 Work8 = S9xAPUGetByte (addr); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void ApuA6 () +static void ApuA6 () { // SBC A, (X) - Work8 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.X); SBC (APURegisters.YA.B.A, Work8); IAPU.PC++; } -void ApuA7 () +static void ApuA7 () { // SBC A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + uint8 Work8 = S9xAPUGetByte (addr); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void ApuA8 () +static void ApuA8 () { // SBC A,#00 - Work8 = OP1; + uint8 Work8 = OP1; SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void ApuA9 () +static void ApuA9 () { // SBC dp(dest), dp(src) - Work8 = S9xAPUGetByteZ (OP1); - W1 = S9xAPUGetByteZ (OP2); + uint8 Work8 = S9xAPUGetByteZ (OP1); + uint8 W1 = S9xAPUGetByteZ (OP2); SBC (W1, Work8); S9xAPUSetByteZ (W1, OP2); IAPU.PC += 3; } -void ApuB4 () +static void ApuB4 () { // SBC A, dp+X - Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void ApuB5 () +static void ApuB5 () { // SBC A,abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + uint8 Work8 = S9xAPUGetByte (addr); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void ApuB6 () +static void ApuB6 () { // SBC A,abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + uint8 Work8 = S9xAPUGetByte (addr); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 3; } -void ApuB7 () +static void ApuB7 () { // SBC A,(dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + uint8 Work8 = S9xAPUGetByte (addr); SBC (APURegisters.YA.B.A, Work8); IAPU.PC += 2; } -void ApuB8 () +static void ApuB8 () { // SBC dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); + uint8 Work8 = OP1; + uint8 W1 = S9xAPUGetByteZ (OP2); SBC (W1, Work8); S9xAPUSetByteZ (W1, OP2); IAPU.PC += 3; } -void ApuB9 () +static void ApuB9 () { // SBC (X),(Y) - W1 = S9xAPUGetByteZ (APURegisters.X); - Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); + uint8 W1 = S9xAPUGetByteZ (APURegisters.X); + uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y); SBC (W1, Work8); S9xAPUSetByteZ (W1, APURegisters.X); IAPU.PC++; } -void ApuAF () +static void ApuAF () { // MOV (X)+, A S9xAPUSetByteZ (APURegisters.YA.B.A, APURegisters.X++); IAPU.PC++; } -void ApuBE () +static void ApuBE () { // DAS if ((APURegisters.YA.B.A & 0x0f) > 9 || !APUCheckHalfCarry()) @@ -2210,7 +2218,7 @@ IAPU.PC++; } -void ApuBF () +static void ApuBF () { // MOV A,(X)+ APURegisters.YA.B.A = S9xAPUGetByteZ (APURegisters.X++); @@ -2218,74 +2226,74 @@ IAPU.PC++; } -void ApuC0 () +static void ApuC0 () { // DI APUClearInterrupt (); IAPU.PC++; } -void ApuA0 () +static void ApuA0 () { // EI APUSetInterrupt (); IAPU.PC++; } -void ApuC4 () +static void ApuC4 () { // MOV dp,A S9xAPUSetByteZ (APURegisters.YA.B.A, OP1); IAPU.PC += 2; } -void ApuC5 () +static void ApuC5 () { // MOV abs,A - Absolute (); - S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address); + uint16 addr = Absolute(); + S9xAPUSetByte (APURegisters.YA.B.A, addr); IAPU.PC += 3; } -void ApuC6 () +static void ApuC6 () { // MOV (X), A S9xAPUSetByteZ (APURegisters.YA.B.A, APURegisters.X); IAPU.PC++; } -void ApuC7 () +static void ApuC7 () { // MOV (dp+X),A - IndexedXIndirect (); - S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address); + uint16 addr = IndexedXIndirect(); + S9xAPUSetByte (APURegisters.YA.B.A, addr); IAPU.PC += 2; } -void ApuC9 () +static void ApuC9 () { // MOV abs,X - Absolute (); - S9xAPUSetByte (APURegisters.X, IAPU.Address); + uint16 addr = Absolute(); + S9xAPUSetByte (APURegisters.X, addr); IAPU.PC += 3; } -void ApuCB () +static void ApuCB () { // MOV dp,Y S9xAPUSetByteZ (APURegisters.YA.B.Y, OP1); IAPU.PC += 2; } -void ApuCC () +static void ApuCC () { // MOV abs,Y - Absolute (); - S9xAPUSetByte (APURegisters.YA.B.Y, IAPU.Address); + uint16 addr = Absolute(); + S9xAPUSetByte (APURegisters.YA.B.Y, addr); IAPU.PC += 3; } -void ApuCD () +static void ApuCD () { // MOV X,#00 APURegisters.X = OP1; @@ -2293,7 +2301,7 @@ IAPU.PC += 2; } -void ApuCF () +static void ApuCF () { // MUL YA APURegisters.YA.W = (uint16) APURegisters.YA.B.A * APURegisters.YA.B.Y; @@ -2301,59 +2309,59 @@ IAPU.PC++; } -void ApuD4 () +static void ApuD4 () { // MOV dp+X, A S9xAPUSetByteZ (APURegisters.YA.B.A, OP1 + APURegisters.X); IAPU.PC += 2; } -void ApuD5 () +static void ApuD5 () { // MOV abs+X,A - AbsoluteX (); - S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address); + uint16 addr = AbsoluteX(); + S9xAPUSetByte (APURegisters.YA.B.A, addr); IAPU.PC += 3; } -void ApuD6 () +static void ApuD6 () { // MOV abs+Y,A - AbsoluteY (); - S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address); + uint16 addr = AbsoluteY(); + S9xAPUSetByte (APURegisters.YA.B.A, addr); IAPU.PC += 3; } -void ApuD7 () +static void ApuD7 () { // MOV (dp)+Y,A - IndirectIndexedY (); - S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address); + uint16 addr = IndirectIndexedY(); + S9xAPUSetByte (APURegisters.YA.B.A, addr); IAPU.PC += 2; } -void ApuD8 () +static void ApuD8 () { // MOV dp,X S9xAPUSetByteZ (APURegisters.X, OP1); IAPU.PC += 2; } -void ApuD9 () +static void ApuD9 () { // MOV dp+Y,X S9xAPUSetByteZ (APURegisters.X, OP1 + APURegisters.YA.B.Y); IAPU.PC += 2; } -void ApuDB () +static void ApuDB () { // MOV dp+X,Y S9xAPUSetByteZ (APURegisters.YA.B.Y, OP1 + APURegisters.X); IAPU.PC += 2; } -void ApuDF () +static void ApuDF () { // DAA if ((APURegisters.YA.B.A & 0x0f) > 9 || APUCheckHalfCarry()) @@ -2373,7 +2381,7 @@ IAPU.PC++; } -void ApuE4 () +static void ApuE4 () { // MOV A, dp APURegisters.YA.B.A = S9xAPUGetByteZ (OP1); @@ -2381,16 +2389,16 @@ IAPU.PC += 2; } -void ApuE5 () +static void ApuE5 () { // MOV A,abs - Absolute (); - APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.YA.B.A = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void ApuE6 () +static void ApuE6 () { // MOV A,(X) APURegisters.YA.B.A = S9xAPUGetByteZ (APURegisters.X); @@ -2398,16 +2406,16 @@ IAPU.PC++; } -void ApuE7 () +static void ApuE7 () { // MOV A,(dp+X) - IndexedXIndirect (); - APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndexedXIndirect(); + APURegisters.YA.B.A = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void ApuE8 () +static void ApuE8 () { // MOV A,#00 APURegisters.YA.B.A = OP1; @@ -2415,16 +2423,16 @@ IAPU.PC += 2; } -void ApuE9 () +static void ApuE9 () { // MOV X, abs - Absolute (); - APURegisters.X = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.X = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.X); IAPU.PC += 3; } -void ApuEB () +static void ApuEB () { // MOV Y,dp APURegisters.YA.B.Y = S9xAPUGetByteZ (OP1); @@ -2432,16 +2440,16 @@ IAPU.PC += 2; } -void ApuEC () +static void ApuEC () { // MOV Y,abs - Absolute (); - APURegisters.YA.B.Y = S9xAPUGetByte (IAPU.Address); + uint16 addr = Absolute(); + APURegisters.YA.B.Y = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.Y); IAPU.PC += 3; } -void ApuF4 () +static void ApuF4 () { // MOV A, dp+X APURegisters.YA.B.A = S9xAPUGetByteZ (OP1 + APURegisters.X); @@ -2449,34 +2457,34 @@ IAPU.PC += 2; } -void ApuF5 () +static void ApuF5 () { // MOV A, abs+X - AbsoluteX (); - APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteX(); + APURegisters.YA.B.A = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void ApuF6 () +static void ApuF6 () { // MOV A, abs+Y - AbsoluteY (); - APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address); + uint16 addr = AbsoluteY(); + APURegisters.YA.B.A = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 3; } -void ApuF7 () +static void ApuF7 () { // MOV A, (dp)+Y - IndirectIndexedY (); - APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address); + uint16 addr = IndirectIndexedY(); + APURegisters.YA.B.A = S9xAPUGetByte (addr); APUSetZN8 (APURegisters.YA.B.A); IAPU.PC += 2; } -void ApuF8 () +static void ApuF8 () { // MOV X,dp APURegisters.X = S9xAPUGetByteZ (OP1); @@ -2484,7 +2492,7 @@ IAPU.PC += 2; } -void ApuF9 () +static void ApuF9 () { // MOV X,dp+Y APURegisters.X = S9xAPUGetByteZ (OP1 + APURegisters.YA.B.Y); @@ -2492,14 +2500,14 @@ IAPU.PC += 2; } -void ApuFA () +static void ApuFA () { // MOV dp(dest),dp(src) S9xAPUSetByteZ (S9xAPUGetByteZ (OP1), OP2); IAPU.PC += 3; } -void ApuFB () +static void ApuFB () { // MOV Y,dp+X APURegisters.YA.B.Y = S9xAPUGetByteZ (OP1 + APURegisters.X);